Semiconductor Memory Repair Using Test Control Block

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Solution Overview

Problem

Conventional semiconductor memory devices face challenges in repairing failed cells after packaging, as laser fuses cannot be programmed post-packaging, and E-fuses are one-time program cells, limiting the ability to perform redundancy operations after the device is fabricated.

Innovation Solution

Incorporating a nonvolatile memory block and a test control block that allows for the generation and testing of control signals during a program mode without actually programming the nonvolatile memory cells, enabling the determination of normal operation and storage of repair data for redundancy operations without consuming nonvolatile memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If laser fuses are used to store repair data, then the device can perform redundancy operations during wafer state, but the laser fuses cannot be programmed after packaging and the cells cannot be recovered

Engineering Contradiction:
Improveease of programmingVSAvoidprogrammability after packaging
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent changes the programming method parameter from laser-based physical fusion to electrical pulse-based E-fuse mechanism, enabling programming both during wafer state and after packaging. This parameter change allows the same storage mechanism to function in both manufacturing and post-packaging scenarios.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements preliminary testing of the E-fuse array during wafer state before final packaging, allowing identification and replacement of defective cells in advance. This preliminary action ensures that only functional E-fuses are used for storing repair data after packaging.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If E-fuses are used to store repair data, then the device can be programmed after packaging, but the E-fuses are one-time program cells that cannot be recovered to original state

Engineering Contradiction:
Improveprogrammability after packagingVSAvoidrecoverability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent creates a copy of the repair data storage function by implementing a test mode that reads from and writes to E-fuses without permanently altering them. This copying mechanism allows verification of E-fuse functionality and data storage capability while preserving the ability to recover and reuse the same E-fuses.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces a dynamic test mode that can switch between different operational states (testing vs. normal operation) of the E-fuse array. In test mode, the system can perform read/write operations without committing permanent changes, allowing the system to adapt its behavior based on whether it needs to verify functionality or perform actual repair data storage.

Inventive Principle:
Principle #15Dynamics

3Reliability

If a test mode is added to verify nonvolatile memory operation, then the system can determine normal operation without direct programming, but the device complexity increases

Engineering Contradiction:
Improveoperation verificationVSAvoidtest control block
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a test control block that serves multiple functions: it can test E-fuse array functionality, verify nonvolatile memory operation, and support both wafer state and post-packaging operations. By making the test control block multi-functional, the patent reduces the need for separate dedicated test circuits for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The test control block acts as an intermediary between the external test equipment and the E-fuse array, enabling verification of normal operation without requiring direct programming. This intermediary layer allows the system to test functionality through controlled read/write operations while isolating the complex testing logic from the actual memory cells.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Adaptability or versatility

If nonvolatile memory cells are used for storing repair data, then redundancy operations can be performed after fabrication, but the cells are consumed during testing

Engineering Contradiction:
Improvepost-fabrication repair capabilityVSAvoidnonvolatile memory cell consumption
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

The patent performs preliminary testing of the E-fuse array during wafer state before final packaging and data storage. This preliminary action identifies and replaces defective cells in advance, ensuring that only functional E-fuses are used for storing repair data after packaging, thereby preventing cell consumption during subsequent testing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent creates a copy of the repair data storage function by implementing a test mode that reads from and writes to E-fuses without permanently altering them. This copying mechanism allows verification of E-fuse functionality and data storage capability while preserving the ability to recover and reuse the same E-fuses, preventing cell consumption.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9362004B2Semiconductor device, semiconductor memory device and memory system
Publication Date: 2016.06.07 SK HYNIX INC
  • US9362004B2 patent drawing
  • US9362004B2 patent drawing
  • US9362004B2 patent drawing

AI summary

A semiconductor device includes a nonvolatile memory block suitable for outputting data stored in a plurality of nonvolatile memory cells included therein based on first control information, and programming data in the nonvolatile memory cells based on second control information; a control block suitable for generating the first control information based on an initialization signal, wherein the control block sequentially generates the second control information and the first control information when a program mode is activated; and a test control block suitable for deactivating the nonvolatile memory block and determining whether at least one control signal among a plurality of control signals included in the first and second control information is normally generated, in a test operation on the program mode.