Semiconductor Memory Shared Sense Amplifier Refresh Conflict
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Solution Overview
Problem
There is a conflict between external addresses and refresh addresses in semiconductor memory chips, particularly when performing self-refresh operations, leading to potential operational conflicts and inefficiencies due to shared sense amplifier arrays and external command interference.
Innovation Solution
The semiconductor apparatus and system employ shared sense amplifier arrays to manage both external and refresh operations by storing refresh addresses and varying their values, allowing for simultaneous normal and refresh operations, and utilizing alert signals to delay external commands when conflicts arise, ensuring efficient self-refresh operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If shared sense amplifier arrays are used to reduce device complexity, then the number of sense amplifier arrays is reduced, but conflicts between external addresses and refresh addresses occur
Solution Approach 1:
The patent divides the memory device into multiple banks, each with its own sense amplifier array. This segmentation allows independent refresh operations in different banks while external commands can access any bank, eliminating conflicts between refresh and external operations. Each bank operates independently, so refresh in one bank does not interfere with external commands in other banks.
Solution Approach 2:
The patent implements preliminary refresh operations by periodically refreshing each bank before external commands are executed. The refresh counter tracks which banks need refreshing and performs refresh operations in advance, ensuring that when external commands arrive, the necessary banks are already in a ready state, preventing conflicts.
2Reliability
If refresh operations are performed automatically to maintain data integrity, then data retention is improved, but operational efficiency decreases when external commands are pending
Solution Approach 1:
The patent implements dynamic refresh control where the refresh counter and bank controller adaptively manage refresh operations based on the current operational state. When external commands are detected, the system dynamically adjusts refresh timing to perform refresh operations during idle periods or after external commands complete, rather than performing refresh continuously regardless of external command status.
Solution Approach 2:
The patent uses periodic refresh operations managed by a refresh counter that cycles through banks in a predetermined sequence. This periodic action ensures all banks are refreshed at regular intervals while the bank controller can interrupt or delay refresh in specific banks when external commands are active, balancing data retention with operational efficiency.
3Extent of automation
If self-refresh operation is implemented to perform refresh without external control, then automation is improved, but conflicts with external commands occur
Solution Approach 1:
The patent introduces a bank controller as an intermediary component that mediates between the autonomous refresh mechanism and external commands. The bank controller receives signals from the refresh counter and external command signals, and intelligently determines which banks should perform refresh operations and when, preventing conflicts with external commands while maintaining autonomous refresh functionality.
Solution Approach 2:
The patent implements feedback mechanisms where the bank controller monitors the status of external commands and adjusts refresh operations accordingly. When external commands are detected or when banks are in use, the feedback mechanism signals the refresh counter to delay or skip refresh operations for those banks, ensuring command execution accuracy while maintaining autonomous refresh capability for other banks.
Data Source
AI summary
A semiconductor apparatus includes a plurality of unit memory blocks and a plurality of sense amplifier arrays configured to be shared with two or more unit memory blocks among the plurality of unit memory blocks, and amplify data of the unit memory blocks. When a unit memory block corresponding to an external address and a unit memory block corresponding to a refresh address among the plurality of unit memory blocks are coupled in common to one of the plurality of sense simplifier arrays, the semiconductor apparatus stores the refresh address and executes a normal operation command corresponding to the external address.