Semiconductor Memory Device Source Line Bouncing Suppression
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Solution Overview
Problem
The source line bouncing phenomenon in semiconductor memory devices causes under programming and read failures due to the undesired rise in potential of the source plate during programming, reading, or verifying operations, which existing technologies struggle to suppress without increasing chip size.
Innovation Solution
Incorporating a discharge plate on the bottom surface of the source plate and a source line discharge circuit on the substrate, with a discharge path between the discharge plate and the source line discharge circuit to efficiently couple the source plate to ground, thereby reducing the resistance and suppressing the source line bouncing phenomenon.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a discharge path is added to suppress source line bouncing, then discharge efficiency is improved, but chip size increases
Solution Approach 1:
The discharge plate is positioned on the bottom surface of the source plate, utilizing the vertical dimension (z-axis) rather than expanding horizontally. This allows the discharge path to be formed in the thickness direction of the substrate, enabling effective source line bouncing suppression without increasing chip area.
Solution Approach 2:
The discharge plate is integrated within the existing source plate structure, with the discharge path nested within the substrate thickness. The discharge plate occupies the space between the source plate bottom surface and the substrate, effectively utilizing existing vertical space rather than adding external components.
2Reliability
If the source plate potential is reduced during operation, then source line bouncing is suppressed, but programming and read operations become less efficient
Solution Approach 1:
The discharge path is designed to be dynamically controllable through the source line discharge control signal. The path can be activated during programming operations to suppress source line bouncing, and deactivated during read operations to maintain normal read efficiency, allowing adaptive optimization for different operational modes.
Solution Approach 2:
The discharge path is prepared in advance during programming operations by activating the source line discharge control signal, which reduces the source plate potential before and during the programming process. This preliminary action prevents source line bouncing from occurring in the first place, ensuring reliable programming without affecting subsequent read operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the source line bouncing phenomenon without increasing chip size, improving discharge efficiency and preventing under programming and read failures in semiconductor memory devices.
Implementation Method 1
a discharge plate disposed on a bottom surface of the source plate; a source line discharge circuit disposed on a substrate below the discharge plate, and electrically coupling the discharge plate to a ground node
Data Source
AI summary
A semiconductor memory device includes a memory cell array disposed on a source plate; a discharge plate disposed on a bottom surface of the source plate; a source line discharge circuit disposed on a substrate below the discharge plate, and electrically coupling the discharge plate to a ground node in response to a source line discharge control signal; and a discharge path provided between the discharge plate and the source line discharge circuit.