Semiconductor Memory Device Source Voltage Control
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Solution Overview
Problem
P-channel type memory cells in flash memories suffer from gate and drain disturbs during writing operations, leading to shifts in threshold voltages and potential misreading of data due to increased leak currents when source voltage is elevated for improved resistance to gate disturb.
Innovation Solution
A semiconductor memory device with a write circuit that selectively applies different source voltages to different memory blocks during programming, with a high voltage applied to the work memory area to suppress threshold voltage shifts and leak currents, while maintaining appropriate voltages for the code storage memory area to minimize the need for increased source voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If source voltage is elevated to improve resistance to gate disturb, then gate disturb resistance is improved, but leak currents increase
Solution Approach 1:
The patent applies different source voltages to different memory blocks based on their specific requirements. The work memory area receives a higher source voltage (e.g., 2.4V) to improve gate disturb resistance, while the code storage memory area receives a lower source voltage (e.g., 1.8V) to minimize leak currents. This localized voltage differentiation resolves the contradiction by optimizing each area's operating conditions independently.
Solution Approach 2:
The memory device is divided into distinct memory blocks (work memory area and code storage memory area) with independent source voltage control. This segmentation allows each block to operate under optimized voltage conditions, enabling the work memory to withstand gate disturb while keeping leak currents low in the code storage area.
2Stability of the object's composition
If source voltage is elevated to suppress threshold voltage shifts, then threshold voltage stability is improved, but power consumption increases
Solution Approach 1:
Different source voltages are applied to different memory blocks based on their specific requirements. The work memory area receives a higher source voltage (e.g., 2.4V) to improve gate disturb resistance, while the code storage memory area receives a lower source voltage (e.g., 1.8V) to minimize leak currents. This localized voltage differentiation resolves the contradiction by optimizing each area's operating conditions independently.
Solution Approach 2:
The memory device is divided into distinct memory blocks (work memory area and code storage memory area) with independent source voltage control. This segmentation allows each block to operate under optimized voltage conditions, enabling the work memory to withstand gate disturb while keeping leak currents low in the code storage area.
3Productivity
If different source voltages are applied to different memory blocks, then programming efficiency is improved, but device complexity increases
Solution Approach 1:
The memory device is divided into distinct memory blocks (work memory area and code storage memory area) with independent source voltage control. This segmentation allows each block to operate under optimized voltage conditions, enabling the work memory to withstand gate disturb while keeping leak currents low in the code storage area.
Solution Approach 2:
A source line control circuit acts as an intermediary to manage the different source voltages applied to different memory blocks. This control circuit automatically selects and applies the appropriate voltage (e.g., 2.4V for work memory, 1.8V for code storage) based on the programming operation being performed, thereby simplifying the overall system complexity while maintaining programming efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses changes in threshold voltage due to gate disturb and reduces leak currents in the work memory area, while maintaining efficient programming in the code storage area, thereby enhancing data reliability and read speed.
Implementation Method 1
there is known a method to perform writing by injecting hot electrons generated by inter-band tunneling in the vicinity of the drain by applying a voltage to the N-type well and the gate
Implementation Method 2
P-channel type memory cells perform writing by injecting channel hot electrons
Data Source
AI summary
A semiconductor memory device includes a memory block as a code storage memory area which has a large memory capacity and in which the number of bits to be written at once is large, and a memory block as a work memory area which has a small memory capacity and in which the number of bits to be written at once is small, in which in writing to the code storage memory area a first voltage is supplied to a source line of this memory block, and in writing to the work memory area a second voltage higher than the first voltage is supplied to a source line of this memory block.