Semiconductor Memory Control for Low-Power Fast State Recovery
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Solution Overview
Problem
Semiconductor circuits face challenges in reducing power consumption while ensuring quick recovery of operation status after power restart, particularly in achieving low power consumption and efficient data storage and retrieval.
Innovation Solution
A semiconductor circuit configuration including a volatile first storage section, a volatile second storage section, and a non-volatile third storage section, with a control section that compares data between the sections to generate control signals for efficient data transfer and storage, allowing the circuit to reduce power consumption by optimizing data storage and retrieval operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power supply is stopped to reduce power consumption, then power consumption is reduced, but the circuit cannot quickly return to operation status after power restart
Solution Approach 1:
The storage system is segmented into three distinct sections: first volatile storage section for current operation data, second volatile storage section for backup data, and third non-volatile storage section for persistent storage. This segmentation allows selective operation of each section during power restart, enabling quick recovery without requiring full system initialization.
Solution Approach 2:
The second volatile storage section pre-stores data from the first storage section before power shutdown. When power is restarted, this pre-stored data is immediately available for comparison and recovery operations, eliminating the need to retrieve data from slower non-volatile storage during the critical initial recovery phase.
Solution Approach 3:
The control section compares data between the first and second volatile storage sections to generate a second control signal for the third non-volatile storage section. This feedback mechanism ensures data consistency and enables intelligent decision-making about which data to preserve in non-volatile storage, optimizing both recovery speed and data integrity.
2Reliability
If data is continuously stored in non-volatile storage to ensure data persistence, then data reliability is improved, but power consumption increases
Solution Approach 1:
Instead of continuously maintaining all data in non-volatile storage, the system applies partial action by selectively storing only necessary data in the third non-volatile storage section based on comparison results between volatile sections. This reduces the energy burden on non-volatile storage while maintaining sufficient data persistence for recovery operations.
Solution Approach 2:
The second volatile storage section serves as an intermediary between the first volatile storage section and the third non-volatile storage section. It temporarily holds data and enables comparison-based decision-making about what should be persisted, reducing direct write operations to non-volatile storage and thereby reducing power consumption.
3Speed
If multiple storage sections are used to enable quick recovery, then recovery speed is improved, but device complexity increases
Solution Approach 1:
The control section performs multiple functions: generating first control signals for the second volatile storage section, comparing data between storage sections, generating second control signals for the third non-volatile storage section, and generating third control signals for the first volatile storage section. This multi-functionality reduces the need for separate dedicated control circuits for each storage operation, thereby managing complexity.
Solution Approach 2:
The control section combines multiple control operations into a single integrated unit that manages all three storage sections. By merging the control logic for data transfer, comparison, and persistence decisions into one section, the system achieves quick recovery through multiple storage sections while minimizing the increase in overall device complexity.
Data Source
AI summary
A semiconductor circuit of the present disclosure includes: a volatile first storage section; a volatile second storage section that stores data stored in the first storage section on the basis of a first control signal; a non-volatile third storage section that stores data according to data stored in the second storage section on the basis of a second control signal, and causes the first storage section to store data stored in itself on the basis of a third control signal; and a control section that generates the first control signal and the third control signal, and compares the data stored in the first storage section and the data stored in the second storage section with each other to generate the second control signal on the basis of a result of the comparison.


