Semiconductor Memory Test Method Using ECC Engine for Fail Address Repair
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor memory devices become more integrated and faster, the number of failed cells that do not operate correctly increases, necessitating an efficient method to repair these cells to improve yield.
Innovation Solution
A test method that detects failed cells in a memory cell array, encodes and stores their addresses using an error-correcting code (ECC) engine, programs these addresses in an anti-fuse array, and verifies their accuracy to generate repair addresses for retesting and potential repair of the failed cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the integration and speed of semiconductor memory devices are increased, then the performance and capacity of the device are improved, but the number of failed cells that do not operate correctly increases
Solution Approach 1:
The patent applies preliminary action by detecting failed cells and storing their addresses in the memory cell array before final repair operations are performed. The ECC engine encodes fail addresses and they are temporarily stored in the memory array, allowing subsequent repair operations to use this pre-prepared information to replace defective cells with redundant ones, thus maintaining device reliability despite increased integration.
2Reliability
If additional memory is added to store fail addresses, then the reliability of failed cell repair is improved, but the device complexity and area increase
Solution Approach 1:
The patent merges the fail address storage function with the existing memory cell array structure. Instead of adding separate dedicated memory for storing fail addresses, the invention utilizes the memory cell array itself (specifically using available redundancy cells or designated regions within the existing array) to store the encoded fail addresses. This integration approach maintains repair reliability while avoiding additional memory structures and reducing device complexity.
Solution Approach 2:
The memory cell array is given multiple functions: it serves both as the primary storage medium for data and as the storage location for encoded fail addresses during the repair process. The ECC engine encodes fail addresses and stores them in the same memory structure that holds operational data, allowing the system to use existing resources for multiple purposes without increasing overall device complexity.
Data Source
AI summary
A test method of the semiconductor memory device including a memory cell array and an anti-fuse array includes detecting failed cells included in the memory cell array; determining a fail address corresponding to the detected failed cells; storing the determined fail address in a first region of the memory cell array; and reading the fail address stored in the first region to program the read fail address in the anti-fuse array. According to the test method of a semiconductor memory device and the semiconductor memory system, since the test operation can be performed without an additional memory for storing an address, the semiconductor memory device and the test circuit can be embodied by a small area.