Semiconductor Memory Word-Line Drivers for High-Resistance Word Lines

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Solution Overview

Problem

The increasing thickness of word lines in DRAM devices due to the integration of more memory cells leads to higher resistance, which deteriorates the performance of the semiconductor memory device.

Innovation Solution

Applying an operating voltage to opposite ends of the word line using sub-word line drivers to improve the slope of the voltage applied, thereby enhancing the performance of the semiconductor memory device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of memory cells connected to the word line is increased to improve integration, then the degree of integration is improved, but the resistance of the word line increases which deteriorates device performance

Engineering Contradiction:
Improvedegree of integrationVSAvoidword line resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The word line is divided into multiple segments with sub-word line drivers positioned at different locations (first end, second end, and optionally third end) to independently control voltage distribution across different sections of the word line, allowing each segment to be optimized for its specific electrical characteristics

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the word line are provided with different electrical characteristics by placing sub-word line drivers at specific locations (first end, second end, third end) to create localized voltage control zones, enabling optimized performance for each segment while maintaining overall system functionality

Inventive Principle:
Principle #3Local quality

2Reliability

If the thickness of the word line is increased to reduce resistance, then the word line resistance is reduced which improves performance, but the degree of integration deteriorates

Engineering Contradiction:
Improveword line resistanceVSAvoiddegree of integration
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Instead of uniformly increasing word line thickness throughout, the word line is segmented with multiple drivers that can independently adjust voltage distribution, allowing thinner word lines to be used in regions where high integration is critical while maintaining adequate performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The electrical parameters of different word line regions are independently controlled by adjusting the timing and voltage levels of sub-word line drivers at different positions, allowing optimization of resistance characteristics without changing the physical thickness uniformly across the entire word line

Inventive Principle:
Principle #35Parameter changes

3Reliability

If sub-word line drivers are added to provide voltage to opposite ends of the word line to improve performance, then the operation performance is improved, but the device complexity increases

Engineering Contradiction:
Improveoperation performanceVSAvoidnumber of sub-word line drivers
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The sub-word line drivers are designed to serve multiple functions: they provide voltage to specific ends of word lines, control voltage distribution across different segments, and can operate independently or in coordination with each other, allowing a single driver to handle multiple control requirements

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The control architecture transitions from a single-point voltage application to a multi-point distributed control system by adding drivers at different spatial positions (first end, second end, third end), creating a three-dimensional control structure that improves voltage distribution without linearly increasing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250226025A1Semiconductor memory device
Publication Date: 2025.07.10 SAMSUNG ELECTRONICS CO LTD
  • US20250226025A1 patent drawing
  • US20250226025A1 patent drawing
  • US20250226025A1 patent drawing

AI summary

A semiconductor memory device, including: a first semiconductor structure including a first sub-memory cell array comprising a plurality of word lines, and a second semiconductor structure under the first semiconductor structure, wherein the second semiconductor structure includes: a first sub-word line driver configured to supply a word line driving voltage to a first end of a first word line from among the plurality of word lines, a second sub-word line driver configured to supply the word line driving voltage to a second end of the first word line, a third sub-word line driver configured to supply the word line driving voltage to a first end of a second word line from among the plurality of word lines, a fourth sub-word line driver configured to supply the word line driving voltage to a second end of the second word line.