Semiconductor Apparatus Metal Interconnect Warpage Reduction
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Solution Overview
Problem
Current semiconductor manufacturing methods face challenges in downsizing and high-density packaging due to the need for wire bonding, complex solder bump formation, and difficulties in forming through electrodes, which result in warpage and voids during the encapsulation of semiconductor devices.
Innovation Solution
A semiconductor apparatus with a metal interconnect formed on both sides of a photo-curable insulating layer, allowing for easy stacking and encapsulation, using a method that includes forming a first insulating layer, patterning for through electrodes, die bonding, and laminating photo-curable dry films to create a stacked structure with reduced warpage and voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If wire bonding is used to connect semiconductor device to substrate, then electrical connection is achieved, but apparatus size increases and downsizing becomes difficult
Solution Approach 1:
The patent extracts and eliminates the wire bonding process from the semiconductor device structure. Instead of using wire bonds to connect the semiconductor device to the substrate, the invention directly connects the electrode pad on the semiconductor device to the interconnect pattern on the substrate through a through electrode, removing the unnecessary wire bonding component and reducing apparatus size.
Solution Approach 2:
The patent inverts the conventional connection approach by forming the through electrode within the semiconductor device itself rather than using external wire bonds. The connection is achieved by having the electrode pad connect to the interconnect pattern through the through electrode, reversing the traditional wire bonding methodology.
2Length of moving object
If solder bump and pad connection is used for stacking semiconductor devices, then electrical connection is achieved, but highly dense solder bumps are required with downsizing, resulting in difficulty in practice
Solution Approach 1:
The patent extracts and eliminates the solder bump connection method from the stacking structure. Instead of using solder bumps to connect stacked semiconductor devices, the invention uses direct pad-to-pad electrical connection through the substrate, removing the solder bump component and its associated manufacturing precision requirements.
Solution Approach 2:
The patent inverts the conventional stacking connection approach by eliminating solder bumps and using direct electrical connection through the substrate. The electrode pad on the upper semiconductor device connects to the interconnect pattern on the substrate, reversing the traditional solder bump-based stacking methodology.
3Ease of manufacture
If through electrode is formed in substrate for connecting semiconductor device, then electrical connection is achieved, but complicated formation steps are required
Solution Approach 1:
The patent merges the through electrode formation process with the existing substrate manufacturing process. The through electrode is formed as an integral part of the substrate structure during the same manufacturing steps used to create the interconnect patterns, combining multiple functions into a single integrated process.
Solution Approach 2:
The substrate is designed to serve multiple functions: it provides mechanical support, contains interconnect patterns for electrical connection, and incorporates through electrodes for vertical electrical connection. This multi-functionality eliminates the need for separate through electrode formation steps.
4Manufacturing precision
If dense metal interconnects are used in semiconductor apparatus, then higher density is achieved, but warpage occurs during encapsulation
Solution Approach 1:
The patent applies local quality by strategically positioning the metal interconnects within the substrate structure. The through electrodes and interconnect patterns are localized in specific regions where they provide electrical connection, while the surrounding substrate material maintains structural stability and prevents warpage during encapsulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient placement and stacking of semiconductor devices with reduced warpage and voids, even with dense metal interconnects, facilitating the production of thin, compact semiconductor apparatuses suitable for high-density packaging.
Implementation Method 1
a second insulating layer formed on the semiconductor device; a third insulating layer formed on the second insulating layer
Data Source
Figure 1~2
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Figure 7~10
AI summary
The present invention is a semiconductor apparatus including a semiconductor device, an on-semiconductor-device metal pad and a metal interconnect each electrically connected to the semiconductor device, a through electrode and a solder bump each electrically connected to the metal interconnect, a first insulating layer on which the semiconductor device is placed, a second insulating layer formed on the semiconductor device, a third insulating layer formed on the second insulating layer, wherein the metal interconnect is electrically connected to the semiconductor device via the on-semiconductor-device metal pad at an upper surface of the second insulating layer, and the metal interconnect penetrates the second insulating layer from its upper surface and is electrically connected to the through electrode at an lower surface of the second insulating layer. This semiconductor apparatus can be easily placed on a circuit board and stacked, and can reduce its warpage even with dense metal interconnects.