Semiconductor Metal Trace Stability Under Dielectric Layers
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Solution Overview
Problem
Semiconductor metal traces under dielectric layers are prone to cracking and instability due to lack of adequate structural support, affecting the reliability of connections between conductive layers.
Innovation Solution
A semiconductor arrangement is formed with a metal trace under multiple dielectric layers, connected via metal vias and a ball connection, providing increased stability and reduced propensity for cracking by using specific metal trace widths and additional dielectric and metal layers for structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal traces are placed under dielectric layers to connect conductive layers, then electrical connectivity between layers is achieved, but the metal traces become prone to cracking and instability
Solution Approach 1:
The patent applies beforehand cushioning by introducing a compliance layer between the metal trace and the rigid dielectric layers. This compliance layer acts as a cushion that absorbs and distributes mechanical stress before it reaches the metal trace, preventing cracking and instability from developing in the first place. The compliance layer's softer material properties allow it to deform elastically under stress, protecting the metal trace from stress concentration.
Solution Approach 2:
The patent employs composite materials by creating a multi-layer structure consisting of the metal trace, compliance layer, and dielectric layers. Each layer has distinct mechanical properties - the metal trace provides electrical conductivity, the compliance layer provides stress absorption with intermediate mechanical properties, and the dielectric layers provide electrical insulation. This composite structure combines the advantages of different materials to achieve both electrical connectivity and mechanical stability.
2Area of moving object
If metal traces are made narrower to reduce space usage, then area efficiency improves, but the traces become more susceptible to cracking and failure
Solution Approach 1:
The compliance layer serves as a protective cushion that enables the use of narrower metal traces without increasing cracking susceptibility. By absorbing and distributing stress along the trace length, the compliance layer compensates for the reduced cross-sectional area of narrow traces, maintaining their mechanical integrity despite their smaller size.
Solution Approach 2:
The compliance layer acts as an intermediary between the narrow metal trace and the rigid dielectric layers. This intermediary layer transfers and distributes mechanical loads away from the vulnerable narrow trace, allowing the trace to maintain its narrow dimensions for area efficiency while the compliance layer handles the mechanical stress protection.
Data Source
AI summary
A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a metal trace under at least a first dielectric layer and a second dielectric layer. The metal trace is connected to a ball connection by a first via in the first dielectric layer and second via in the second dielectric layer. The metal trace is connected to a test pad at a connection point, where the connection point is under the first dielectric layer. The metal trace under at least the first dielectric layer and the second dielectric layer has increased stability and decreased susceptibility to cracking in least one of the ball connection, the connection point, the first via or the second via as compared to a metal trace that is not under at least a first dielectric layer and a second dielectric layer.