Semiconductor Molding Layer Uneven Surface Stress Reduction
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Solution Overview
Problem
The existing fabricating processes for semiconductor packages often result in physical or electrical damage to the semiconductor chip during the detachment of the release film, due to stress exerted by the molding process, which affects the reliability of connections and the integrity of the chip.
Innovation Solution
The semiconductor package design includes a molding layer with an uneven upper surface, featuring alternating recessed and protruding portions, which reduces stress and physical contact with the release film, and a method of forming a mold via terminal and heat dissipating layer to enhance structural integrity and electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a molding layer is formed surrounding the semiconductor chip during the fabricating process, then the chip is protected and structurally supported, but the release film detachment process causes physical or electrical damage to the chip
Solution Approach 1:
The molding layer is divided into multiple layers: a first molding layer formed initially, and a second molding layer formed subsequently. This segmentation allows the release film to be detached from the first molding layer while the second molding layer remains in place to protect and support the chip, thus preventing damage during detachment
Solution Approach 2:
The first molding layer is formed as a preliminary protective structure before the release film detachment process. This preliminary action ensures that when the release film is detached, the chip already has structural support from the first molding layer, preventing physical or electrical damage
2Ease of manufacture
If the molding layer has a flat upper surface, then the structure is simple and easy to manufacture, but stress concentration occurs during release film detachment affecting chip integrity
Solution Approach 1:
The molding layer is designed with non-uniform thickness, creating local variations in structure. The thickness varies from a first thickness at a first position to a second thickness at a second position, which distributes stress locally during release film detachment rather than concentrating it, thereby protecting chip integrity
Solution Approach 2:
The physical parameter of the molding layer (thickness) is changed across different positions. By varying the thickness from first thickness to second thickness, the stress distribution during release film detachment is optimized, preventing chip damage while maintaining manufacturing feasibility
3Reliability
If the molding layer completely covers the semiconductor chip, then maximum protection is provided, but heat dissipation from the chip is reduced
Solution Approach 1:
The molding coverage is segmented into different zones: areas where the molding layer fully covers the chip for protection, and areas where the chip upper surface is exposed for heat dissipation. This selective coverage balances protection and thermal management
Solution Approach 2:
Different regions of the chip receive different levels of molding coverage. Some regions are fully covered by the molding layer for maximum protection, while other regions have exposed upper surfaces to facilitate heat dissipation, creating localized functional zones
Data Source
AI summary
Semiconductor packages including molding layer and methods of fabricating the same are provided. The method may include forming a bare package including a semiconductor chip on a package substrate and forming a molding layer surrounding the semiconductor chip on the package substrate while contacting an upper surface of the molding layer with a lower surface of a release film. The lower surface of the release film and the upper surface of the molding layer comprising uneven surfaces and the molding layer may expose an upper surface of the semiconductor chip.