Semiconductor Device Multi-Layer Encapsulation Interconnection
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Solution Overview
Problem
Conventional semiconductor manufacturing processes are time-consuming and costly, resulting in unreliable connections and suboptimal interconnection structures in semiconductor packages.
Innovation Solution
A semiconductor device and method involving multiple encapsulating layers and signal distribution structures, including a first signal distribution structure with a top, bottom, and lateral sides, and a second encapsulating material covering conductive pillars and a semiconductor die, with conductive balls electrically connecting to the pillars through apertures in a lower dielectric layer, facilitating efficient interconnection and encapsulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional semiconductor manufacturing processes are used, then manufacturing simplicity is maintained, but manufacturing time and cost increase significantly
Solution Approach 1:
The manufacturing process is divided into distinct modules: forming first and second encapsulating layers, creating first and second signal distribution structures, and establishing multiple interconnection levels. This segmentation allows parallel processing and optimization of each module independently, improving overall manufacturing efficiency while managing complexity through structured organization.
Solution Approach 2:
The patent introduces multiple vertical layers (first encapsulating layer, second encapsulating layer, first and second signal distribution structures) to create a three-dimensional interconnection architecture. This dimensional expansion enables higher density and faster signal transmission without increasing lateral footprint, thereby improving productivity without proportionally increasing process complexity.
2Reliability
If conventional interconnection structures are used, then manufacturing simplicity is maintained, but connection reliability deteriorates
Solution Approach 1:
The patent implements a nested interconnection architecture where conductive pillars are embedded within encapsulating layers, which are in turn surrounded by signal distribution structures. Multiple encapsulating layers are stacked with signal distribution structures between them, creating a nested configuration that enhances mechanical strength and electrical connectivity while distributing stress and improving reliability.
Solution Approach 2:
The interconnection structure combines multiple materials with complementary properties: conductive materials for electrical connectivity, dielectric materials for insulation, and encapsulating materials for mechanical protection. This composite approach optimizes each component for its specific function, resulting in enhanced overall connection reliability while managing structural complexity through material specialization.
3Reliability
If simplified encapsulation is used, then manufacturing cost is reduced, but package reliability deteriorates
Solution Approach 1:
The patent applies different encapsulation characteristics to different regions and levels of the device. The first encapsulating layer provides protection for the initial interconnection structure, while the second encapsulating layer protects the additional signal distribution structures and conductive pillars. Each encapsulating layer is optimized for its specific local requirements, enhancing overall package reliability while allowing cost-effective manufacturing through regional optimization.
Data Source
AI summary
A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising multiple encapsulating layers and multiple signal distribution structures, and a method of manufacturing thereof.