Semiconductor Neural Network Synapse Circuit Analog Processing
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Solution Overview
Problem
Miniaturized electronic components for IoT and AI applications face challenges in reducing circuit scale without compromising processing capability and increasing power consumption due to digital arithmetic operations in neural networks.
Innovation Solution
A semiconductor device with a neural network structure that includes multilayer perceptrons, synapse circuits, and activation function circuits, utilizing analog signals to reduce power consumption by converting weight coefficients into currents and potentials, allowing for efficient arithmetic operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If digital arithmetic operation is used for neuron processing, then processing capability is maintained, but logic scale and power consumption increase
Solution Approach 1:
The patent replaces digital arithmetic operations with analog circuit operations. Specifically, it uses operational amplifiers to perform summation of weighted inputs and activation function circuits to implement nonlinear transformations, substituting digital computation with analog electrical signal processing. This reduces logic scale and power consumption while maintaining neural network processing capability.
Solution Approach 2:
The patent changes the operational parameters from digital discrete values to analog continuous voltages and currents. Weight coefficients are stored as analog values in memory cells, and neural network computations are performed using analog voltage summation and transformation, fundamentally changing the parameter domain to reduce computational complexity.
2Volume of moving object
If circuit scale is reduced for miniaturization, then device size decreases, but processing capability may be compromised
Solution Approach 1:
The patent replaces complex digital arithmetic circuits with simpler analog operational amplifier-based summing circuits and activation function circuits. This substitution dramatically reduces the circuit scale and device area while preserving the essential neural network processing functions, enabling miniaturization without compromising processing capability.
Solution Approach 2:
The operational amplifier serves multiple functions: it performs weighted summation of inputs, implements activation functions through feedback networks, and provides signal buffering. This multi-functionality reduces the number of required circuit components, enabling device miniaturization while maintaining comprehensive processing capability.
Data Source
AI summary
Novel connection between neurons of a neural network is provided.A perceptron included in the neural network includes a plurality of neurons; the neuron includes a synapse circuit and an activation function circuit; and the synapse circuit includes a plurality of memory cells. A bit line selected by address information for selecting a memory cell is shared by a plurality of perceptrons. The memory cell is supplied with a weight coefficient of an analog signal, and the synapse circuit is supplied with an input signal. The memory cell multiplies the input signal by the weight coefficient and converts the multiplied result into a first current. The synapse circuit generates a second current by adding a plurality of first currents and converts the second current into a first potential. The activation function circuit is a semiconductor device that converts the first potential into a second potential by a ramp function and supplies the second potential as an input signal of the synapse circuit included in the perceptron in a next stage.