Semiconductor Device Nitride Oxidation Logic Memory Integration
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Solution Overview
Problem
The complex and incompatible fabrication processes of non-volatile memory cells and logic devices in semiconductor technology lead to increased manufacturing time and cost, as well as difficulties in simplifying the fabrication steps.
Innovation Solution
An integrated process is developed to form a logic device with a first oxide layer and a non-volatile memory device with a second oxide layer on a base, utilizing different nitride arrangements to enhance the gate oxide layer strength, durability, and data retention properties, while simplifying the manufacturing process by forming both devices simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate fabrication processes are used for non-volatile memory cells and logic devices, then each device can be optimized independently, but the manufacturing complexity increases and fabrication time and cost increase
Solution Approach 1:
The patent merges the fabrication processes for non-volatile memory cells and logic devices into a single integrated process. Both device types are formed simultaneously on the same substrate using shared fabrication steps, including the formation of oxide layers, nitride layers, and electrode structures. This consolidation eliminates the need for separate fabrication lines and reduces overall manufacturing complexity while maintaining the ability to optimize each device type through selective processing parameters.
2Reliability
If separate fabrication processes are used for non-volatile memory cells and logic devices, then each device can be optimized independently, but the fabrication time increases
Solution Approach 1:
The patent implements continuous fabrication where the formation of memory cells and logic devices occurs in an uninterrupted sequence within the same process chamber. The integrated process allows for continuous deposition of oxide and nitride layers, continuous patterning operations, and continuous formation of electrode structures, eliminating idle time between separate fabrication processes while maintaining optimal processing conditions for both device types.
3Reliability
If separate fabrication processes are used for non-volatile memory cells and logic devices, then each device can be optimized independently, but the manufacturing cost increases
Solution Approach 1:
The patent creates a universal fabrication process that serves multiple functions by simultaneously manufacturing both non-volatile memory cells and logic devices. The same process equipment, materials, and procedures are used for both device types, with selective application of processing parameters to achieve device-specific optimization. This multi-functionality reduces capital equipment requirements, material costs, and operational expenses compared to maintaining separate fabrication processes.
4Device complexity
If nitride layer is uniformly distributed, then the structure is simple, but the gate oxide layer strength and data retention property are insufficient
Solution Approach 1:
The patent applies local quality by creating non-uniform nitride distribution with different concentrations and arrangements in different regions of the device structure. Specifically, the nitride layer is positioned with varying thickness and composition at critical interfaces such as the gate oxide-nitride boundary and within the memory cell region versus the logic device region. This localized variation in nitride properties enhances gate oxide strength and data retention in the memory device while maintaining compatibility with the logic device fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing time and cost, improves the strength and reliability of the logic device, and enhances the data retention properties of the non-volatile memory device, allowing for efficient programming, erasing, and reading operations.
Implementation Method 1
the nitride layer is oxidized. A part of nitride in the nitride layer moves to the first oxide layer and the base
Data Source
AI summary
A semiconductor device and a method of fabricating the same are provided. First, a first oxide layer and a nitride layer are formed on a base having a first region and a second region. Next, the nitride layer is oxidized. A part of nitride in the nitride layer moves to the first oxide layer and the base. An upper portion of the nitride layer is converted to an upper oxide layer. Then, the upper oxide layer, the nitride layer and the first oxide layer in the second region are removed. Thereon, a second oxide layer is grown on the base in the second region. Nitride in the second region moves to the second oxide layer.