Semiconductor Overlay Vernier Silicidation Prevention

Solution Overview

Problem

In semiconductor device manufacturing, achieving accurate alignment between patterns formed by different masking processes is challenging due to the risk of silicidation and agglomeration in overlay vernier patterns, which can lead to errors in overlay measurement and reduced yield.

Innovation Solution

A method is developed where a substrate is divided into regions with different pattern densities, forming insulating patterns that protect the silicon layer in one region from conversion to a silicide, while using dummy patterns and vernier patterns in another region to ensure accurate alignment without silicidation, thereby reducing errors in overlay measurement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If overlay vernier patterns are formed using standard masking processes, then alignment accuracy can be checked, but silicidation and agglomeration occur leading to measurement errors

Engineering Contradiction:

Improveoverlay measurement accuracyVSAvoidmeasurement reliability

Core Design Contradiction:

Measurement precisionVSReliability

Solution Approach 1:

The substrate is divided into a first region containing preliminary patterns and a second region containing overlay vernier patterns and dummy patterns. This spatial segmentation allows different pattern densities and materials to be used in different regions, preventing silicidation in the vernier measurement region while maintaining functional patterns in the first region.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are given different local properties: the first region has lower pattern density suitable for device fabrication, while the second region has higher pattern density with dummy patterns specifically designed for overlay measurement. The vernier patterns in the second region use materials or structures that prevent silicidation, ensuring measurement reliability.

Inventive Principle:

Principle #3Local quality

2Manufacturing precision

If pattern density is increased to improve overlay measurement accuracy, then alignment precision improves, but silicidation and agglomeration risks increase

Engineering Contradiction:

Improvealignment precisionVSAvoidsilicidation and agglomeration

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The substrate is divided into a first region containing preliminary patterns and a second region containing overlay vernier patterns and dummy patterns. This spatial segmentation allows different pattern densities and materials to be used in different regions, preventing silicidation in the vernier measurement region while maintaining functional patterns in the first region.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are given different local properties: the first region has lower pattern density suitable for device fabrication, while the second region has higher pattern density with dummy patterns specifically designed for overlay measurement. The vernier patterns in the second region use materials or structures that prevent silicidation, ensuring measurement reliability.

Inventive Principle:

Principle #3Local quality

3Reliability

If dummy patterns with high density are formed on the second region, then overlay measurement reliability improves, but process complexity increases

Engineering Contradiction:

Improveoverlay measurement reliabilityVSAvoidpattern formation complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The substrate is divided into a first region containing preliminary patterns and a second region containing overlay vernier patterns and dummy patterns. This segmentation isolates the complex high-density dummy patterns to a specific region, making the overall process more manageable and allowing standard fabrication processes to be used without requiring complete process redesign.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The dummy patterns in the second region serve multiple functions: they provide a high-density pattern environment for accurate overlay measurement, act as etch stop layers, and prevent silicidation of the vernier patterns. This multi-functionality reduces the need for additional separate process steps.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of overlay measurements and increases the yield of semiconductor devices by preventing silicidation and agglomeration in vernier patterns, ensuring precise alignment and pattern formation.

Implementation Method 1

converting the exposed silicon layer on the first region to a silicide layer while the blocked silicon layer on the second region is protected from the conversion

Methodology Applied

Scientific EffectSilicidation: Chemical Bonding

Data Source

PatentUS20170103990A1Method of manufacturing semiconductor device

Publication Date: 2017.04.13 MIMIRIP LLC

AI summary

In an embodiment of the present disclosure, a method of manufacturing a semiconductor device may include forming a pattern group on a substrate, the substrate being divided into first and second regions, each pattern including a silicon layer, forming an insulating pattern on the substrate, the insulating pattern partially exposing the silicon layer on the first region and blocking the silicon layer on the second region, converting the exposed silicon layer on the first region to a silicide layer while the blocked silicon layer on the second region is protected from the conversion, and performing a subsequent process using, as an overlay vernier, at least a portion of the pattern group formed on the second region.