Semiconductor Package Cavity Bonding to Prevent Solder Cracks
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Solution Overview
Problem
The reliability and yield of semiconductor packages deteriorate due to repeated heat treatment processes during manufacturing, leading to defects such as non-wetting and cracks in the solder portions of the bump structures.
Innovation Solution
A semiconductor package design that includes an adhesive layer attached to the cavity of the upper substrate, allowing simultaneous heat treatment processes for mounting the semiconductor chip and coupling the upper and lower substrates, thereby preventing defects and enhancing reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If heat treatment processes are repeated during manufacturing, then chip mounting and substrate bonding can be completed, but defects such as non-wetting and cracks occur in the solder portions
Solution Approach 1:
The patent combines the chip mounting heat treatment process and the substrate bonding heat treatment process into a single simultaneous operation. The bump structures and connection structures both undergo heat treatment at the same time, eliminating the need for sequential processing. This merging of processes prevents repeated thermal cycling that causes solder defects, while maintaining both chip attachment and substrate bonding quality.
2Manufacturing precision
If separate heat treatment processes are used for chip mounting and substrate bonding, then each process can be optimized, but manufacturing time and process complexity increase
Solution Approach 1:
The patent implements simultaneous heat treatment for both chip mounting and substrate bonding in a single manufacturing step. The bump structures for chip mounting and connection structures for substrate bonding are both subjected to the same heat treatment process at the same time, reducing manufacturing cycle time while maintaining process control through unified parameters.
Solution Approach 2:
The heat treatment process is designed to serve multiple functions simultaneously: it performs both chip mounting (through bump structures) and substrate bonding (through connection structures). This multi-functional approach eliminates the need for separate optimized processes, reducing overall manufacturing time while achieving both objectives in one universal heat treatment step.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design prevents defects like non-wetting and cracks, improving the reliability and yield of the semiconductor package by integrating a low melting point metal in the bump and connection structures.
Implementation Method 1
an adhesive layer disposed on the bottom surface of the cavity; the second surface of the semiconductor chip is attached to the adhesive layer
Implementation Method 2
each of the bump structure and the connection structure includes a low melting point metal
Implementation Method 3
the heat treatment processes for mounting the chip and bonding the substrates are performed simultaneously
Data Source
AI summary
A semiconductor package includes: a lower substrate including a lower wiring layer; an upper substrate disposed on the lower substrate and including an upper wiring layer and a cavity; an adhesive layer disposed in the cavity; a semiconductor chip having a first surface and a second surface opposite to the first surface, wherein connection pads are disposed on the first surface of the semiconductor chip and are electrically connected to the lower wiring layer, and wherein the second surface of the semiconductor chip is attached to the adhesive layer; a connection structure disposed between the lower substrate and the upper substrate and electrically connecting the lower wiring layer and the upper wiring layer; an encapsulant at least partially surrounding at least a portion of each of the semiconductor chip and the connection structure; and connection bumps electrically connected to the lower wiring layer.