Semiconductor Package Conductive Bar Pillar Design
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Solution Overview
Problem
High power semiconductor device packaging faces challenges in controlling current path resistance and heat management, which affects efficiency and performance due to the need for careful design of pads, contacts, and traces.
Innovation Solution
A semiconductor device package design featuring a substrate with a semiconductor device having distinct contact pads, where a conductive bar is placed on one pad and multiple conductive pillars on the other, with a dielectric layer and patterned conductive layer to enhance electrical and thermal conductivity, and a method involving substrate preparation, dielectric layer formation, and conductive material application to fill holes for improved contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional packaging design is used for high power semiconductor devices, then manufacturing is simpler, but current path resistance is not properly controlled leading to efficiency reduction and excessive heating
Solution Approach 1:
The package structure is segmented into distinct functional zones: a first contact pad region with a conductive bar for high current paths, and a second contact pad region with conductive pillars for signal paths. This segmentation allows independent optimization of each current path type, enabling precise control over resistance characteristics for different functional requirements.
Solution Approach 2:
Different regions of the package are assigned different conductive structures tailored to their specific functional requirements. The first contact pad area uses a conductive bar configuration optimized for high current carrying capacity, while the second contact pad area uses conductive pillars optimized for signal integrity. This local quality approach ensures each region has the optimal structure for its intended purpose.
2Reliability
If larger contact pads are used to reduce resistance, then current handling improves, but device area increases
Solution Approach 1:
The conductive bar extends in a longitudinal dimension rather than simply expanding the contact pad area in the planar dimension. This dimensional transition allows the current path to achieve lower resistance through increased conductive volume and length without proportionally increasing the footprint area, thus improving current handling while controlling package size.
3Power
If multiple conductive paths are added to handle high power, then power handling improves, but manufacturing complexity increases
Solution Approach 1:
The dielectric layer serves multiple functions simultaneously: it provides electrical insulation between conductive elements, defines the structural framework for mounting both conductive bars and conductive pillars, and establishes the spatial relationships between different current paths. This multi-functionality reduces the need for additional specialized components or processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively manages high current flow and reduces heat, enhancing efficiency and performance by providing high conductance for higher power signals and mitigating electromagnetic interference and cross-talk.
Implementation Method 1
a conductive bar disposed on the first contact pad, and a conductive pillar disposed on the second contact pad
Implementation Method 2
forming a dielectric layer on the substrate to cover the semiconductor device
Data Source
AI summary
A semiconductor device package includes a substrate and a semiconductor device disposed on a surface of the substrate. The semiconductor device includes a first contact pad and a second contact pad disposed on an upper surface of the semiconductor device. The semiconductor device package further includes a conductive bar disposed on the first contact pad, and a conductive pillar disposed on the second contact pad. A method of making a semiconductor device package includes (a) providing a substrate; (b) mounting a semiconductor device on the substrate, wherein the semiconductor device comprises a first contact pad and a second contact pad on an upper surface of the semiconductor device; (c) forming a dielectric layer on the substrate to cover the semiconductor device; (d) exposing the second contact pad by forming a hole in the dielectric layer; and (e) applying a conductive material over the dielectric layer and filling the hole.