Semiconductor Package Corner Recess Structure for Warpage Uniformity

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Solution Overview

Problem

Semiconductor packages experience warpage due to differences in coefficients of thermal expansion between the semiconductor chip and the package substrate, leading to uneven warpage magnitudes at the center and edge of the substrate.

Innovation Solution

A semiconductor package design featuring a base substrate with recesses at its corners, filled by a molding member with protrusions, which helps to reduce warpage by distributing thermal stress evenly across the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional semiconductor package structure is used, then the package can be manufactured with standard processes, but warpage occurs unevenly between the center and edge of the substrate due to thermal expansion differences

Engineering Contradiction:
Improvewarpage uniformityVSAvoidsubstrate flatness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent introduces recesses at specific locations (corners and/or edges) of the base substrate to create local structural variations. These recesses are strategically positioned to address the non-uniform thermal expansion stresses that occur during packaging processes. By modifying only specific regions rather than the entire substrate, the design achieves more uniform warpage characteristics while maintaining standard manufacturing processes.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The base substrate is segmented by introducing recesses that divide the continuous substrate structure into distinct regions. This segmentation allows different parts of the substrate to accommodate thermal stresses independently, preventing the accumulation of uniform stress across the entire substrate and thereby reducing non-uniform warpage.

Inventive Principle:
Principle #1Segmentation

2Strength

If the base substrate is made thicker to reduce warpage, then structural strength improves, but manufacturing complexity and material usage increase

Engineering Contradiction:
Improvesubstrate structural strengthVSAvoidsubstrate structure
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

Instead of uniformly increasing the substrate thickness throughout, the patent applies local reinforcement by forming recesses at specific critical locations. This localized structural modification provides the necessary strength to resist warpage without requiring a overall increase in substrate thickness, thereby avoiding increased material usage and manufacturing complexity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively minimizes warpage between the center and edge of the package substrate, enhancing the reliability and durability of semiconductor packages by mitigating thermal expansion-related distortions.

Implementation Method 1

Semiconductor packages experience warpage due to differences in coefficients of thermal expansion between the semiconductor chip and the package substrate

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS12057357B2Semiconductor package including plurality of recesses and molding member with plurality of protrusions that fill the recesses
Publication Date: 2024.08.06 SAMSUNG ELECTRONICS CO LTD
  • US12057357B2 patent drawing
  • US12057357B2 patent drawing
  • US12057357B2 patent drawing

AI summary

A semiconductor package includes a base substrate that includes a first surface and a second surface that face each other, a plurality of first metal line patterns disposed on the first surface, a plurality of second metal line patterns disposed on the second surface, a plurality of vias that penetrate the base substrate and connect the first metal line patterns to the second metal line patterns, a semiconductor chip disposed on the first surface, and a molding member that covers the first surface and the semiconductor chip. The base substrate includes at least one recess at a corner of the base substrate. The recess extends from the first surface toward the second surface. The molding member includes a protrusion that fills the recess.