Semiconductor Package Dual-Layer Mold EMI Shielding

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor devices experience electromagnetic interference (EMI) due to increased processing speeds and smaller sizes, leading to higher electromagnetic emissions, which can adversely affect neighboring devices, and existing shielding methods may exacerbate parasitic capacitance issues.

Innovation Solution

A semiconductor package device design featuring a substrate with passive and active components, a dual-layer package body structure, and a conformal shielding layer that reduces EMI by electrically connecting the shielding layer to the substrate's grounding element, while increasing mold clearance to minimize parasitic capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a shielding layer is added to reduce EMI, then electromagnetic interference is reduced, but parasitic capacitance increases

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidparasitic capacitance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies local quality by using different materials for different portions of the package body. Specifically, the first portion covering the active component is made of a different material than the second portion covering the passive component. This allows optimization of EMI shielding in the active component area while minimizing parasitic capacitance effects in the passive component area, thus resolving the contradiction between EMI reduction and parasitic capacitance control.

Inventive Principle:
Principle #3Local quality

2Speed

If processing speeds are increased, then performance is improved, but electromagnetic emissions increase

Engineering Contradiction:
Improveprocessing speedVSAvoidelectromagnetic emissions
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the EMI shielding function into a separate shielding layer that is electrically connected to the substrate's grounding element. This shielding layer is specifically positioned to cover the active component, which is the primary source of electromagnetic emissions at high processing speeds. By extracting and isolating the shielding function, the patent enables high processing speeds while controlling electromagnetic emissions.

Inventive Principle:
Principle #2Taking out (Extraction)

3Volume of moving object

If device size is reduced, then integration density is improved, but EMI increases

Engineering Contradiction:
Improvedevice sizeVSAvoidelectromagnetic interference
Core Design Contradiction:
Volume of moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies the nested doll principle by integrating the shielding layer within the package body structure itself. The shielding layer is positioned between the active component and the external environment, nested within the overall package architecture. This allows compact device sizing while maintaining EMI shielding effectiveness, as the shielding function is embedded rather than added as a separate external component.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces electromagnetic interference and improves the accuracy of passive components by controlling insertion and return loss, while maintaining reliable device operation.

Implementation Method 1

When electromagnetic emissions from an interior of the package strike an inner surface of the casing, at least a portion of these emissions can be electrically shorted, thereby reducing the level of emissions that can pass through the casing

Methodology Applied
Scientific EffectElectrical shorting: Conduction (electrical)

Data Source

PatentUS10756025B2Semiconductor package device and method of manufacturing the same
Publication Date: 2020.08.25 ADVANCED SEMICON ENG INC
  • US10756025B2 patent drawing
  • US10756025B2 patent drawing
  • US10756025B2 patent drawing

AI summary

A semiconductor package device includes: (1) a substrate having a top surface; (2) a passive component disposed on the substrate and having a top surface; (3) an active component disposed on the substrate and having a top surface; and (4) a package body disposed on the substrate, the package body including a first portion covering the active component and the passive component, and a second portion covering the passive component, wherein a top surface of the second portion of the package body is higher than a top surface of the first portion of the package body, and the first portion and the second portion of the package body include different materials.