Semiconductor Package With Embedded Routing Traces
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Solution Overview
Problem
Conventional QFN semiconductor packages have exposed traces that are vulnerable to contamination and mechanical damage, leading to electrical shorts and open circuits, and require thickness reduction to meet modern electronic device needs.
Innovation Solution
A semiconductor package with internal routing traces and a protective layer is developed, using a lead frame with wire bonding pads and conductive terminals, where the traces are encapsulated to prevent contamination and mechanical damage, and the package thickness is minimized through advanced manufacturing methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional QFN package with exposed traces is used, then electrical connections are established, but traces are vulnerable to contamination and mechanical damage
Solution Approach 1:
The patent embeds the routing traces within a cavity formed in the lead frame, nesting the traces inside a protective structure rather than exposing them on the surface. This nesting approach protects traces from contamination and mechanical damage while maintaining electrical connectivity, directly resolving the vulnerability issue without adding external protective components that would increase package complexity.
Solution Approach 2:
The patent transitions from a two-dimensional surface layout of traces to a three-dimensional structure by forming a cavity within the lead frame thickness. The traces are positioned within this cavity, utilizing the vertical dimension to provide protection while maintaining compact packaging. This dimensional change allows trace protection without significantly increasing the overall package footprint or complexity.
2Length of stationary object
If package thickness is reduced to meet modern device needs, then device size is minimized, but trace protection becomes more challenging
Solution Approach 1:
The cavity structure nests the traces within the lead frame thickness itself, utilizing the available vertical space for protection rather than adding external protective layers. This nesting approach maintains thin package profile while providing enclosed protection for traces against contamination and mechanical damage.
Solution Approach 2:
The patent employs a molding compound that forms a protective shell over the lead frame and embedded traces. This thin film encapsulation provides environmental protection while adding minimal thickness to the overall package, allowing trace protection without significantly increasing package size.
3Ease of operation
If traces are exposed on the bottom of the package, then electrical connections are accessible, but contamination causes electrical short circuits
Solution Approach 1:
The traces are nested within a cavity in the lead frame, which is then encapsulated by molding compound. This nested structure provides enclosed protection against environmental contamination while maintaining electrical connectivity through the bottom of the package via conductive terminals that extend through the molding compound.
Solution Approach 2:
The molding compound acts as an intermediary protective layer between the environment and the traces. It provides contamination protection while allowing electrical connections to pass through via conductive terminals, mediating between the need for protection and the need for electrical accessibility.
4Ease of operation
If traces are exposed on the bottom of the package, then electrical connections are accessible, but mechanical damage causes open circuits
Solution Approach 1:
The traces are nested within a cavity formed in the lead frame, providing mechanical protection from external forces. The cavity structure and surrounding lead frame material shield the traces from mechanical damage that could cause open circuits, while electrical connections remain accessible through protected terminals.
Solution Approach 2:
The molding compound forms a protective shell over the lead frame and embedded traces, providing mechanical strength and protection against physical damage. This encapsulation shields the traces from mechanical stresses while maintaining electrical connectivity through the bottom of the package.
Data Source
AI summary
A method of and device for making a semiconductor package. The method comprises etching a first side of a metallic piece forming a leadframe with one or more wire bonding pads, applying a first protective layer on the first side, etching a second side of the metallic piece forming one or more conductive terminals, and applying a second protective layer on the second side. The semiconductor package comprises wire bonding pads in pillars structure surrounding a die attached to the leadframe. One or more terminals are on the bottom side of the semiconductor package.