Semiconductor Package Heat Emission Member Vertical Thermal Path
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Solution Overview
Problem
The demand for smaller and lighter electronic components, particularly in portable devices, necessitates high-density integration of semiconductor chips within limited package volumes while effectively managing heat generation, which existing technologies struggle to achieve without compromising performance.
Innovation Solution
A semiconductor package design incorporating a package substrate, a heat emission member with horizontal and vertical units, and a molding member that surrounds semiconductor chip stacks, where the heat emission member directly contacts the lower semiconductor chip to enhance heat dissipation and includes an electromagnetic wave shielding member to prevent interference, allowing for efficient chip arrangement and heat management.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If semiconductor chips are densely integrated within limited package volume, then productivity and miniaturization are improved, but heat dissipation becomes more difficult and heat transmission to other chips increases
Solution Approach 1:
The heat emission member extends in the vertical direction (z-axis) with a height greater than the chip stack height, transitioning heat management from a planar approach to a three-dimensional structure. This vertical extension allows heat to be conducted away from the chip stack in the thickness direction, effectively utilizing the z-dimension for thermal management while maintaining high integration density in the horizontal plane.
Solution Approach 2:
The heat emission member acts as an intermediary thermal management component positioned between the lower chip and the molding compound. It provides a dedicated thermal conduction pathway that intercepts heat at the source (lower chip) and conducts it away before the heat can spread to adjacent chip stacks, thus preventing heat transmission to other chips while supporting high integration density.
2Temperature
If heat emission member extends vertically between chip stacks, then heat dissipation is improved, but device complexity increases
Solution Approach 1:
The heat emission member simultaneously performs multiple functions: (1) conducts heat away from the lower chip in the vertical direction, (2) acts as a thermal barrier preventing heat transmission to adjacent chip stacks, and (3) provides structural support within the package. This multi-functionality reduces the need for separate components, thereby limiting the increase in device complexity while achieving effective heat emission.
Solution Approach 2:
The heat emission member is integrated with the package substrate, forming a unified thermal management structure. By merging the heat emission function with the existing substrate structure rather than adding completely separate components, the increase in device complexity is minimized while still achieving the desired heat dissipation performance.
3Productivity
If multiple chip stacks are arranged closely for high-density integration, then productivity is improved, but electromagnetic interference between chips increases
Solution Approach 1:
The electromagnetic wave shielding member acts as an intermediary barrier positioned between adjacent chip stacks. It intercepts and reflects electromagnetic waves before they can propagate between neighboring chips, thus preventing electromagnetic interference while allowing the chip stacks to be arranged in close proximity for high integration density.
4Weight of moving object
If package volume is reduced for smaller electronic products, then weight and size are improved, but heat dissipation capability deteriorates
Solution Approach 1:
The heat emission member utilizes the vertical dimension (z-axis) by extending its height beyond the chip stack height. This three-dimensional thermal management approach allows effective heat dissipation within a compact horizontal footprint, enabling reduced package volume and weight while maintaining adequate heat dissipation capability through vertical heat conduction pathways.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables efficient heat emission and high-density integration of semiconductor chips within a limited structure, improving performance by preventing heat transmission to other chips and reducing electromagnetic interference, thus addressing the challenge of making electronic components smaller and lighter.
Implementation Method 1
a heat emission member on the lower semiconductor chip, the heat emission member having a horizontal unit and a vertical unit connected to the horizontal unit
Implementation Method 2
an electromagnetic wave shielding member that covers a side surface of the package substrate and a surface of the molding member
Data Source
AI summary
A semiconductor package includes a package substrate, a lower semiconductor chip on the package substrate, a heat emission member on the lower semiconductor chip, the heat emission member having a horizontal unit and a vertical unit connected to the horizontal unit, a first semiconductor chip stack and a second semiconductor chip stack on the horizontal unit, and a molding member that surrounds the lower semiconductor chip, the first and second semiconductor chip stacks, and the heat emission member. The vertical unit may be arranged between the first semiconductor chip stack and the second semiconductor chip stack, and an upper surface of the vertical unit may be exposed in the molding member.