Semiconductor Package With High-Density Patch for Die Interconnects
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Solution Overview
Problem
Conventional semiconductor packaging methods face challenges in efficiently connecting high-density semiconductor dies while maintaining the routing density of low-density substrates, leading to increased costs and potential reliability issues.
Innovation Solution
A semiconductor device design featuring a low-density substrate with embedded low-density pillars and a high-density patch that allows high-density bumps to connect directly, bypassing the low-density substrate, and includes a manufacturing method to ensure electrical connections are reliable and cost-effective.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-density semiconductor dies are connected through low-density substrate routing, then electrical connections are established, but the routing density of the substrate increases leading to higher costs and potential reliability issues
Solution Approach 1:
The patent transitions from two-dimensional routing through the substrate to three-dimensional direct bump-to-bump connections. High-density bumps on the semiconductor die connect directly to corresponding bumps on the package substrate without traversing through substrate routing layers, effectively adding a vertical dimension to the connection path and eliminating the need for complex lateral routing.
Solution Approach 2:
The invention extracts the high-density connection function from the low-density substrate routing system. By implementing dedicated high-density bump arrays that bypass the substrate's low-density routing structure, the patent separates the high-density interconnect function from the substrate's primary low-density routing function, allowing each to operate at its optimal density.
2Ease of manufacture
If conventional packaging methods are used to connect high-density bumps, then manufacturing is simplified, but electrical connections reliability deteriorates
Solution Approach 1:
The patent segments the connection system into two distinct pathways: low-density routing through the substrate for general connections, and high-density direct bump-to-bump connections for critical signal paths. This segmentation allows each pathway to be optimized independently, with the high-density pathway providing superior electrical connection reliability while the low-density pathway maintains manufacturing simplicity.
3Reliability
If substrate routing density is increased to accommodate high-density connections, then electrical connections are improved, but manufacturing costs increase
Solution Approach 1:
The patent applies local quality by creating localized high-density bump arrays in specific regions of the semiconductor die and package substrate. Rather than uniformly increasing routing density across the entire substrate, the high-density connection structure is implemented only where needed for critical connections, maintaining cost-effectiveness while improving electrical connection reliability in specific areas.
Data Source
AI summary
A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.