Semiconductor Package Inner Lead Pattern Pitch Adjustment
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Solution Overview
Problem
The connection between inner lead patterns and semiconductor chips in semiconductor packages is inadequate due to misalignment caused by differences in thermal expansion coefficients between the semiconductor chip and the flexible film, leading to potential electrical shorts and reliability issues in display devices.
Innovation Solution
The semiconductor package design includes a first inner lead pattern group with a higher density of metal interconnections and a second inner lead pattern group with a lower density, both formed on a flexible film, where the pitch and length of the lead patterns are adjusted to align with the semiconductor chip, and the bumps are spaced to accommodate varying thermal expansion, preventing misalignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the inner lead pattern density is increased to improve connection characteristics, then the connection reliability improves, but the pitch between lead patterns decreases causing misalignment with the semiconductor chip
Solution Approach 1:
The patent applies different pitch values to different groups of inner lead patterns based on their corresponding metal interconnection densities. Specifically, when the metal interconnection density in a first region is higher than in a second region, the pitch of inner lead patterns in the first region is set larger than in the second region. This local differentiation resolves the contradiction by allowing each region to have optimal lead pattern spacing matched to its interconnection density, preventing misalignment while maintaining connection reliability.
2Manufacturing precision
If the pitch of inner lead patterns is increased to prevent misalignment, then the alignment precision improves, but the connection density decreases leading to inadequate connections
Solution Approach 1:
The patent differentiates the pitch of inner lead patterns according to the metal interconnection density in corresponding regions. By setting larger pitch values in regions with high metal interconnection density and smaller pitch values in regions with low metal interconnection density, the patent simultaneously achieves proper alignment (preventing misalignment) and adequate connection density (ensuring reliable connections) in each respective region.
3Reliability
If the metal interconnection density is increased to improve electrical connection, then the electrical conductivity improves, but the thermal expansion stress increases causing misalignment
Solution Approach 1:
The patent changes the pitch parameter of inner lead patterns based on the metal interconnection density parameter. When metal interconnection density is high, the pitch is increased to accommodate greater thermal expansion stress. When metal interconnection density is low, the pitch is decreased. This parameter adjustment resolves the contradiction by allowing the lead pattern geometry to compensate for thermal expansion effects in high-density regions while maintaining proper connections in low-density regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively prevents misalignment and electrical shorts, enhancing the reliability of display devices by ensuring proper connection between the semiconductor chip and the flexible film, even under thermal expansion variations.
Implementation Method 1
differences in thermal expansion coefficients between the semiconductor chip and the flexible film
Data Source
AI summary
A semiconductor package includes a first metal interconnection disposed in a semiconductor chip, a first bump group configured to be connected to the first metal interconnection, a first inner lead pattern group configured to be connected to the first bump group, a second metal interconnection disposed in the semiconductor chip, a second bump group configured to be connected to the second metal interconnection; and a second inner lead pattern group configured to be connected to the second bump group, wherein a density of the first metal interconnection is greater than a density of the second metal interconnection, such that a first pitch of the first lead pattern group is greater than a second pitch of the second lead pattern group.