Semiconductor Package IR Reflection Layer for Reflow Heat Shielding

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Solution Overview

Problem

The use of infrared reflow schemes for mounting semiconductor packages can lead to increased radiation heat, potentially degrading data retention and reliability in semiconductor chips due to rapid temperature increases.

Innovation Solution

Incorporating an infrared reflection layer, such as copper or aluminum, on the semiconductor package or using materials with low infrared absorption rates on the package or printed wiring board surfaces to reflect or absorb infrared heat, thereby reducing heat transfer to the semiconductor chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If infrared reflow scheme is used for mounting semiconductor packages, then mounting speed is improved, but temperature increase degrades data retention and reliability

Engineering Contradiction:
Improvemounting speedVSAvoiddata retention
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

An infrared reflection layer is introduced as an intermediary between the semiconductor chip and the infrared heat source. This layer reflects infrared radiation before it reaches the chip, preventing rapid temperature increases that would degrade data retention while still allowing the infrared reflow process to proceed for mounting purposes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The infrared radiation, which initially causes harmful rapid heating of the semiconductor chip, is converted into a beneficial reflected radiation that can be directed away from the chip. The reflection layer transforms the harmful infrared energy into a non-damaging reflected beam, maintaining mounting speed while protecting data integrity.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Temperature

If infrared reflection layer is added to semiconductor package, then heat transfer to chip is reduced, but device complexity increases

Engineering Contradiction:
Improvechip temperatureVSAvoidpackage structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The infrared reflection layer changes the optical parameters of the package surface by introducing materials with specific infrared reflectivity properties. This parameter change enables the package to actively manage thermal radiation without fundamentally altering the basic package structure, thus reducing temperature increase while minimizing complexity addition.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The solution employs composite material structures where the infrared reflection layer is integrated with existing package materials. By using composite materials with tailored infrared reflective properties, the package achieves temperature control functionality without requiring completely new structural designs, thereby limiting the increase in device complexity.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents data degradation by minimizing temperature increases in the semiconductor chip, improving reliability and potentially reducing mounting time through controlled heat application.

Implementation Method 1

an infrared reflection layer containing any of aluminum, aluminum oxide, and titanium oxide

Methodology Applied
Scientific EffectInfrared reflection: Reflection

Implementation Method 2

using materials with low infrared absorption rates on the package or printed wiring board surfaces to reflect or absorb infrared heat

Methodology Applied
Scientific EffectInfrared absorption: Absorption (EM radiation)

Data Source

PatentUS20260011657A1Semiconductor package and semiconductor device
Publication Date: 2026.01.08 KIOXIA CORP
  • US20260011657A1 patent drawing
  • US20260011657A1 patent drawing
  • US20260011657A1 patent drawing

AI summary

A semiconductor package of an embodiment includes: a wiring substrate having a first surface and a second surface on a side opposite to the first surface; at least one semiconductor chip provided in plurality at different heights from the first surface in a vertical direction; a sealing resin covering the first surface of the wiring substrate and surfaces of the at least one semiconductor chip; a layer formed over a top layer of the at least one semiconductor chip; and an external terminal provided on the second surface of the wiring substrate. The wiring substrate is electrically connectable with a printed wiring board through the external terminal.