Semiconductor Package With Lateral Heat Dissipation Plate
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Solution Overview
Problem
Current semiconductor packages face challenges in achieving high integration, high speed, and efficient heat radiation while maintaining improved electrical characteristics.
Innovation Solution
A semiconductor package design that includes a redistribution layer and multiple semiconductor chips stacked on a package substrate, with bonding wires and connection members minimizing transmission distance and allowing for effective heat radiation, and a molding layer for encapsulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple semiconductor chips are stacked to achieve high integration, then the quantity of chips per package is increased, but the heat radiation efficiency deteriorates due to accumulated heat in the stacked structure
Solution Approach 1:
The patent introduces a lateral heat dissipation pathway by extending the heat dissipation plate to the side surface of the package, moving heat management from a purely vertical conduction path to a combined lateral-convection path. This dimensional extension allows heat to escape through the side surfaces of the package, effectively resolving the heat accumulation problem in stacked chip configurations.
2Ease of manufacture
If bonding wires are used for electrical connection, then the ease of manufacture is improved, but the transmission distance increases and electrical characteristics deteriorate
Solution Approach 1:
The patent merges the electrical connection function and heat dissipation function into a single integrated structure (the heat dissipation plate with conductive portions). This eliminates the need for separate bonding wires, reducing transmission distance while maintaining ease of manufacture through the integrated design that serves dual purposes.
3Ease of manufacture
If the semiconductor chip structure is simplified, then the ease of manufacture is improved, but the heat radiation capability deteriorates
Solution Approach 1:
The heat dissipation plate is designed to perform multiple functions: it serves as an electrical connection element (replacing bonding wires), a thermal conduction path (connecting chips to the heat dissipation structure), and a lateral heat radiation surface (extending to side surfaces). This multi-functionality maintains structural simplicity while significantly improving heat radiation capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances electrical connectivity, reduces transmission distance, and facilitates efficient heat dissipation, addressing the need for high integration, speed, and improved electrical characteristics.
Implementation Method 1
bonding wires and connection members minimizing transmission distance
Implementation Method 2
a heat dissipation plate extending to a side surface of the package in a direction crossing the first direction and the second direction
Implementation Method 3
connection members minimizing transmission distance
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
A semiconductor package includes a package substrate (100), a first semiconductor chip (200) on the package substrate (100), and a second semiconductor chip (300a) on the first semiconductor chip (200). The first semiconductor chip (200) comprises a chip substrate including a first surface and a second surface opposite to the first surface, a plurality of first chip pads (203) between the package substrate (100) and the chip substrate, and electrically connecting the first semiconductor chip (200) to the package substrate (100), a plurality of second chip pads (205) disposed on the second surface and between the second semiconductor chip (300a) and the second surface, and a plurality of redistribution lines (209) on the second surface, the redistribution lines (209) electrically connecting to the second semiconductor chip (300a), and a plurality of bonding wires (230) electrically connecting the redistribution lines (209) to the package substrate (100).