Semiconductor Package Layout With Metal Core Spacers for Dense I/O
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Solution Overview
Problem
Highly integrated semiconductor chips with reduced distances between input/output terminals face interference issues, necessitating fan-out semiconductor packages to increase terminal distances.
Innovation Solution
A semiconductor package design featuring a first and second package substrate with metal core structures and solder balls connecting upper and lower surface pads, arranged to maintain distance and avoid vertical overlap with upper surface pads, ensuring structural reliability and electrical connection integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If highly integrated semiconductor chips are used to increase capacity and reduce device size, then the number of I/O terminals is increased, but the distance between input and output terminals is reduced causing interference
Solution Approach 1:
The patent introduces metal core structures that extend vertically between the first and second package substrates, creating a three-dimensional electrical connection path. This allows I/O terminals to be distributed across multiple layers (upper surface pads on first substrate, lower surface pads on second substrate) rather than being confined to a single plane, effectively increasing terminal distance and reducing interference while maintaining high integration.
Solution Approach 2:
The metal core structures serve as intermediary elements that facilitate electrical connection between the upper surface pads and lower surface pads. These metal cores act as mediators that enable long-distance electrical connections through the package structure without requiring direct lateral routing between terminals, thus solving the interference problem while maintaining terminal quantity.
2Reliability
If metal core structures are used to connect upper and lower surface pads, then electrical connection reliability is improved, but structural complexity increases
Solution Approach 1:
The patent combines multiple functions into the metal core structures: they serve as electrical interconnects, mechanical support elements, and spacing maintainers between substrates. By merging these functions into a single structural element, the design achieves reliable electrical connections without proportionally increasing overall structural complexity.
Solution Approach 2:
The metal core structures are designed to perform multiple roles simultaneously: providing electrical pathways between pads, maintaining physical separation between substrates, and serving as anchoring points for solder balls. This multi-functionality reduces the need for additional separate components, balancing reliability improvement with complexity control.
3Ease of manufacture
If solder balls are used to connect package substrates, then ease of assembly is improved, but susceptibility to warping and wrinkling under pressure or heat increases
Solution Approach 1:
The patent employs a composite connection system combining metal core structures with solder balls. The metal cores provide rigid structural support and dimensional stability, while the solder balls provide ease of assembly through reflow soldering. This composite approach maintains manufacturability while resisting warping and wrinkling under thermal and mechanical stress.
Solution Approach 2:
The metal core structures are positioned and secured before final solder ball attachment, providing a pre-established rigid framework that prevents warping and wrinkling during subsequent assembly and reflow processes. This prior structural support cushions the package against deformation during manufacturing and operation.
Data Source
AI summary
A semiconductor package includes a first package substrate having a lower surface and an upper surface respectively including a plurality of first lower surface pads and a plurality of first upper surface pads, a second package substrate having a lower surface and an upper surface respectively including a plurality of second lower surface pads and a plurality of second upper surface pads, wherein the plurality of second upper surface pads comprise all of the upper surface pads at the upper surface of the second package substrate, a semiconductor chip provided between the first package substrate and the second package substrate and attached onto the first package substrate, and a plurality of metal core structures connecting some of the plurality of first upper surface pads to some of the plurality of second lower surface pads and not vertically overlapping any of the plurality of second upper surface pads, each metal core structure having a metal core.