Semiconductor Package Planarization for RDL Formation
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Solution Overview
Problem
The existing comparative fan-out techniques for semiconductor package devices face challenges due to variations in the thickness or height of electronic components, which affect the formation of redistribution layers (RDL) as the electrical connection pads/terminals/contacts/electrodes are not at the same elevation, leading to adverse effects on the RDL formation.
Innovation Solution
A semiconductor package device and method that include a circuit layer, an electronic component, a package element, and encapsulants, where the package element is disposed on the circuit layer, and the encapsulants are used to encapsulate the components while exposing electrical contacts, with a filler at the boundary between encapsulants having a planar surface perpendicular to the circuit layer surface, ensuring consistent elevation and facilitating the formation of a redistribution layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple electronic components are disposed on a carrier with varying thicknesses, then the electrical connection pads are exposed, but the pads are not at the same elevation which adversely affects RDL formation
Solution Approach 1:
A planarization layer is introduced as an intermediary between the electronic components with varying thicknesses and the redistribution layer. This planarization layer fills the gaps and covers the taller components, creating a substantially planar surface that allows the RDL to be formed at a consistent elevation across all connection pads, thus resolving the elevation inconsistency problem while maintaining adaptability to different component heights
Solution Approach 2:
The solution transitions from a two-dimensional planar arrangement to a three-dimensional structure by adding vertical layers (planarization layer and encapsulants) that compensate for height variations. This dimensional approach allows components of different thicknesses to coexist while maintaining a uniform top surface for RDL formation
2Manufacturing precision
If a planarization layer is added to achieve uniform elevation, then RDL formation is enabled, but the device structure becomes more complex
Solution Approach 1:
The encapsulant material is designed to serve multiple functions simultaneously: it provides mechanical protection, electrical insulation, and planarization in a single integrated component. By incorporating fillers within the encapsulant, the solution achieves both structural support and surface flattening without requiring separate dedicated layers for each function, thus reducing overall device complexity
Solution Approach 2:
The planarization function is merged with the encapsulation function by integrating fillers directly into the encapsulant material. This combination eliminates the need for separate planarization layers and simplifies the manufacturing process, as the encapsulant is formed in a single step that simultaneously protects components and creates a uniform surface
Data Source
AI summary
A semiconductor package device comprises a circuit layer, an electronic component disposed on the circuit layer, a package element and a first encapsulant. The package element is disposed on the circuit layer. The package element includes at least two electrical contacts electrically connected to the circuit layer. The first encapsulant is disposed on the circuit layer. The first encapsulant encapsulates the electronic component and the package element and exposes the electrical contacts of the package element.