Semiconductor Package Through Holes via Patterned Resist
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Solution Overview
Problem
Conventional semiconductor package structures face challenges in miniaturization due to increased surface roughness of through holes caused by filler particles in encapsulants, which complicates the electroplating process and may result in electrical discontinuity, while reducing filler particle size compromises the structural strength of the package.
Innovation Solution
A method involving the formation of a patterned resist layer to replace the encapsulant, allowing for the drilling of through holes within the resist layer instead of the encapsulant, thereby improving drilling efficiency and reducing surface roughness, and facilitating a more reliable electroplating process for forming conductive through holes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If filler particles are used in the encapsulant, then the structural strength of the package is improved, but the surface roughness of through holes increases
Solution Approach 1:
The patent extracts the harmful effect of filler particles by forming through holes in the encapsulant using laser drilling followed by electroplating, where the filler particles are removed along with the encapsulant material during drilling, and the resulting voids are filled with conductive material through electroplating, thus eliminating the surface roughness problem while maintaining structural integrity
Solution Approach 2:
The patent introduces an intermediary process of laser drilling and electroplating between the encapsulant formation and final package completion. The laser drilling creates initial through holes, and the electroplating process fills these holes with conductive material, serving as an intermediary step that transforms the rough surface caused by filler particles into a smooth, electrically conductive surface
2Manufacturing precision
If the size of filler particles is reduced, then the surface roughness of through holes is reduced, but the structural strength of the package is compromised
Solution Approach 1:
The patent changes the parameter of filler particle size to a feasible range that balances surface roughness and structural strength. By optimizing the filler particle size within acceptable limits and combining it with laser drilling and electroplating processes, the patent achieves both reduced surface roughness and maintained structural strength
3Ease of manufacture
If laser drilling and electroplating are performed on encapsulant with filler particles, then through holes are formed, but the electroplating process becomes difficult and electrical discontinuity occurs
Solution Approach 1:
The patent applies preliminary laser drilling to create through holes in the encapsulant before performing electroplating. This preliminary action removes the filler particles and creates clean pathways that facilitate subsequent electroplating, ensuring complete metal deposition and avoiding electrical discontinuity
Solution Approach 2:
The patent replaces traditional mechanical drilling methods with laser drilling technology. The laser drilling process provides more precise hole formation with cleaner edges and better removal of filler particles, thereby improving the subsequent electroplating process and ensuring reliable electrical connectivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electroplating process and improves the electrical reliability of the semiconductor package by reducing surface roughness and maintaining structural strength, enabling effective electrical connectivity and stacking of semiconductor packages.
Implementation Method 1
forming an encapsulant on the carrier so as to encapsulate the semiconductor chip and the patterned resist layer
Implementation Method 2
a laser drilling process is generally performed to form through holes in the encapsulant 12
Implementation Method 3
an electroplating process is performed to form the conductive through holes 15 in the through holes
Data Source
AI summary
A method for fabricating a package structure is provided, including the steps of: disposing on a carrier a semiconductor chip having an active surface facing the carrier; forming a patterned resist layer on the carrier; forming on the carrier an encapsulant exposing an inactive surface of the semiconductor chip and a surface of the patterned resist layer; and removing the carrier to obtain a package structure. Thereafter, redistribution layers can be formed on the opposite sides of the package structure, and a plurality of through holes can be formed in the patterned resist layer by drilling, thus allowing a plurality of conductive through holes to be formed in the through holes for electrically connecting the redistribution layers on the opposite sides of the package structure. Therefore, the invention overcomes the conventional drawback of surface roughness of the through holes caused by direct drilling the encapsulant having filler particles.