Semiconductor Packaging Frame with Conductive Columns
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Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing smaller electronic components with new packaging technologies like wafer level packaging and package on package, which require smaller form factors and better thermal management, while also dealing with difficulties in forming through-package vias and high thermal expansion mismatch between silicon-based interposers and printed circuit boards.
Innovation Solution
The use of packaging frames with conductive columns that provide thermal dissipation and electrical connections, replacing traditional interposers, and forming through-molding vias to reduce manufacturing costs and form factor, while enabling 3D packaging and advanced stacking densities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional interposers are used for packaging, then electrical connections are provided, but thermal expansion mismatch between silicon-based interposers and printed circuit boards occurs
Solution Approach 1:
The patent removes the traditional silicon-based interposer from the packaging structure and replaces it with a packaging frame that has openings. This extraction eliminates the thermal expansion mismatch problem while maintaining the electrical connection function through conductive columns formed in the molding compound.
Solution Approach 2:
The patent introduces molding compound as an intermediary material that fills the openings in the packaging frame and forms conductive columns. This intermediary serves both as a structural support and as a medium for creating electrical connections, replacing the traditional interposer function without the thermal expansion issues.
2Temperature
If packaging frames with conductive columns are used, then thermal dissipation is improved, but manufacturing complexity increases
Solution Approach 1:
The patent combines the structural frame with the electrical connection function by integrating conductive columns directly into the molding compound that fills the frame openings. This merging eliminates the need for separate interposer fabrication and assembly processes, reducing manufacturing complexity while maintaining thermal dissipation capabilities.
Solution Approach 2:
The molding compound serves multiple functions simultaneously: it provides structural support, enables thermal dissipation through the conductive columns, and creates the electrical connections. This self-service approach reduces the need for additional components and manufacturing steps.
3Ease of manufacture
If through-package vias are formed to reduce form factor, then manufacturing costs are reduced, but difficulty in forming through-package vias increases
Solution Approach 1:
Instead of forming through-package vias through the substrate after packaging, the patent inverts the approach by forming conductive columns within the molding compound during the packaging process itself. This inversion makes the via formation easier and integrates it naturally into the existing packaging workflow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for smaller form factors, improved thermal management, and reduced manufacturing costs by using packaging frames that facilitate 3D packaging and advanced stacking, addressing the challenges of through-package via formation and thermal expansion mismatch.
Implementation Method 1
forming a molding compound to fill space between the semiconductor die and the interposer frame
Implementation Method 2
packaging frames with conductive columns that provide thermal dissipation
Implementation Method 3
conductive columns that provide thermal dissipation and electrical connections
Data Source
AI summary
A method of packaging a semiconductor die includes connecting an interposer frame directly to a substrate, wherein the interposer frame has a plurality of conductive columns. The method further includes attaching the semiconductor die to the substrate in an opening of the interposer frame, wherein the semiconductor die directly contacts the substrate. The method further includes forming a molding compound to fill space between the semiconductor die and the interposer frame. The method further includes removing a portion of the molding compound to expose the plurality of conductive columns. The method further includes forming a redistribution layer directly contacting a top surface of the semiconductor die and a top surface of the interposer frame.


