Semiconductor Pad and Electrode Layout for Thermal Stress Management
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Solution Overview
Problem
Semiconductor devices face challenges in maintaining reliability at high voltages, experiencing current density non-uniformity and potential insulating layer damage due to thermal stress, which affects their performance and functionality.
Innovation Solution
The semiconductor device design includes a light-emitting structure with specific configurations of first and second light-emitting portions, connection electrodes, and pads that avoid overlapping, ensuring uniform current distribution and preventing insulating layer damage by optimizing the arrangement of pads and electrodes to manage thermal stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If pads overlap connection electrodes in the thickness direction, then electrical connection is simplified, but insulating layer damage occurs due to thermal stress at high voltage
Solution Approach 1:
The patent transitions from a two-dimensional overlapping arrangement to a three-dimensional stacked arrangement where pads and connection electrodes are separated in the thickness direction. This dimensional change allows both pads and connection electrodes to maintain their functions without direct overlap, preventing insulating layer damage while preserving electrical connectivity through the stacked configuration.
Solution Approach 2:
The patent segments the electrical connection path into distinct layers: connection electrodes in the first conductivity type semiconductor layer and pads in the second conductivity type semiconductor layer. This segmentation separates the current injection function (connection electrodes) from the current collection function (pads), eliminating the need for overlapping and preventing thermal stress damage to the insulating layer.
2Productivity
If current density is concentrated in specific regions, then light emission efficiency increases, but current distribution uniformity deteriorates leading to device degradation
Solution Approach 1:
The patent implements local quality by positioning connection electrodes and pads at specific locations within the semiconductor layer structure. The connection electrodes are placed in the first conductivity type semiconductor layer while pads are placed in the second conductivity type semiconductor layer, creating localized current injection and collection regions that ensure uniform current distribution across the light-emitting portions without concentration in specific areas.
Data Source
AI summary
An embodiment provides a semiconductor device including a light-emitting structure including a plurality of light-emitting portions disposed at a side and a plurality of second light-emitting portions disposed at another side, a plurality of first connection electrodes configured to electrically connect the plurality of first light-emitting portions, a plurality of second connection electrodes configured to electrically connect the plurality of second light-emitting portions, a first pad disposed on the plurality of first light-emitting portions, and a second pad disposed on the plurality of second light-emitting portions. The first pad includes a plurality of 1-2 pads extending toward the second pad. The second pad includes a plurality of 2-2 pads extending toward the first pad. The first connection electrode includes a region between the plurality of 1-2 pads in a thickness direction of the light-emitting structure. The second connection electrode includes a region between the plurality of 2-2 pads in the thickness direction of the light-emitting structure.