Semiconductor Package Pad Layer Structure for Planar Flip-Chip Bonding
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Solution Overview
Problem
The presence of defects such as dimples in the pad layer of semiconductor packages using flip-chip mounting methods affects the reliability and yield, particularly due to issues with solder bumps and electrical connections.
Innovation Solution
A semiconductor package design with a lower redistribution structure, including a lower redistribution layer and insulating layer, and connecting structures with specific thin film layers and pad layers to ensure electrical connectivity and surface planarity, reducing gaps and improving adhesion and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional pad layer structure is used in flip-chip mounting, then the manufacturing process is simple, but defects such as dimples occur affecting reliability and yield
Solution Approach 1:
The pad layer is divided into multiple distinct layers: a first pad layer in contact with the solder bump and a second pad layer above it. This segmentation allows each layer to perform specific functions - the first pad layer provides a stable bonding surface while the second pad layer provides electrical connection, thereby improving reliability without creating a single complex structure.
Solution Approach 2:
The first pad layer acts as an intermediary between the solder bump and the second pad layer. This intermediate layer prevents direct contact between the solder bump and the underlying structure, eliminating the dimple defect while maintaining electrical connectivity through the second pad layer and connecting structures.
2Manufacturing precision
If the conductive connection portion is formed to fill via holes, then electrical connectivity is achieved, but surface unevenness occurs affecting subsequent layer formation
Solution Approach 1:
The connecting structures extend in the vertical dimension above the conductive connection portion. By placing the second pad layer and subsequent structures at a higher vertical level, the design bypasses the surface unevenness problem while maintaining electrical connectivity through the vertical extending connecting structures.
Solution Approach 2:
The insulating layer is formed to cover the lower redistribution layer before the connecting structures are formed. This preliminary insulation layer provides a stable base that allows subsequent layers to be formed with proper planarity, ensuring both surface precision and electrical connection reliability.
3Volume of stationary object
If gap between lower redistribution layer and insulating layer is reduced, then space efficiency is improved, but adhesion and crack resistance deteriorate
Solution Approach 1:
The insulating layer is formed as a preliminary layer that covers the lower redistribution layer before subsequent structures are added. This preliminary insulation layer creates a stable interface that maintains adhesion strength even when gaps are minimized, preventing crack propagation at the interface.
Solution Approach 2:
The package structure uses composite material layers including the insulating layer, lower redistribution layer, and connecting structures. These composite layers work together to maintain both compact volume and strong adhesion, with each material selected for its specific properties to prevent cracking while minimizing overall package size.
Data Source
AI summary
A semiconductor package may include an insulating layer covering a lower redistribution layer and having via holes exposing at least a portion of the lower redistribution layer, a semiconductor chip on the lower redistribution structure and including connection terminals, connecting structures, first pad layers between the connecting structures and the connection terminals, and connection bumps connecting the connection terminals of the semiconductor chip and the first pad layers. The connecting structures may include a first thin film layer extending along inner walls of the via holes of the insulating layer, a conductive connection portion on the first thin film layer, and a second thin film layer on the conductive connection portion. The connecting structures may electrically connect the connection terminals to the lower redistribution layer. An upper surface of the lower redistribution structure and an upper surface of the conductive connection portion may be coplanar.