Semiconductor Pad Structure for Reduced Stack Height
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Solution Overview
Problem
Conventional CMOS image sensors have a high stack height, which can affect sensitivity and cause light diffraction issues, leading to increased material absorption of light intensity and problematic cross talk.
Innovation Solution
A semiconductor device with a lower stack height is achieved through a multilayer interconnect structure, including dielectric layers and a passivation layer, where the pad structure is formed through the passivation layer and electrically connected to lower wirings, reducing the overall thickness and preventing the pad surface from extending beyond the passivation layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the pad structure is formed with a post-passivation pad portion extending above the passivation layer, then the bond pad structure height is increased for better electrical connection, but the overall stack height becomes too high causing light diffraction and sensitivity loss
Solution Approach 1:
The pad structure is repositioned from a vertical extension above the passivation layer to a lateral extension within the same plane as the passivation layer surface. This dimensional change allows the pad to maintain electrical connectivity while eliminating the height-related optical problems.
Solution Approach 2:
The pad structure is designed with differentiated regions: a first pad portion embedded in the passivation layer for electrical connection, and a second pad portion extending laterally at the passivation layer surface for bonding. This local differentiation optimizes both electrical and mechanical functions without increasing stack height.
2Illumination intensity
If the stack height is reduced by lowering the pad structure, then light sensitivity and cross talk are improved, but the electrical connection reliability may be compromised
Solution Approach 1:
The first pad portion is nested within the passivation layer, embedding the electrical connection structure inside the protective passivation layer. This nesting maintains electrical reliability while keeping the overall stack height low to prevent light diffraction issues.
3Ease of operation
If the pad structure extends above the passivation layer surface, then bonding access is improved, but the planar topography is disrupted and stack height increases
Solution Approach 1:
The pad structure extends partially to the passivation layer surface rather than protruding above it. This partial extension provides sufficient bonding access while maintaining the overall planar topography required for subsequent color filter and microlens formation.
Data Source
AI summary
A semiconductor device is disclosed. The semiconductor device provides a substrate comprising an image sensor region and a circuit region, wherein the circuit region comprises a pad region and a connecting region. A multilayer interconnect structure is formed on the substrate, wherein the multilayer interconnect structure comprises a plurality of dielectric layers, a plurality of lower wirings at the pad region and the connecting region, and a top wiring on at least one of the lower wirings at the connecting region. A passivation layer is formed over the multilayer interconnect structure. A pad structure is formed through the passivation layer and at least one of the dielectric layers on and electrically connected to at least one of the lower wirings at the pad region.