Semiconductor Pad With Uneven Surface Topography
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing pad structures in semiconductor devices have flat upper surfaces with low surface roughness, leading to weak friction between the pad and conductive connecting members, resulting in detachment issues and unreliable electrical connections.
Innovation Solution
A pad structure with an insulating layer pattern, plug, and pad design featuring recessed and elevated portions on the upper surface, increasing surface roughness and contact area, ensuring a firm connection with conductive connecting members like wires or bumps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a planarization process is performed to form the pad with a flat upper surface, then the pad surface smoothness is improved, but the friction between the pad and conductive wire is reduced leading to detachment
Solution Approach 1:
The patent applies curvature by forming elevated portions and recessed portions on the pad upper surface instead of maintaining a flat surface. The elevated portions create protrusions that increase surface roughness and friction, while the recessed portions provide anchoring features for the conductive wire, thereby improving connection reliability without compromising manufacturing feasibility
Solution Approach 2:
The patent applies local quality by creating specific elevated and recessed portions at predetermined locations on the pad upper surface. These localized structural variations provide enhanced friction and mechanical interlocking at critical contact points with the conductive wire, while other areas maintain appropriate smoothness for manufacturing processes
2Ease of manufacture
If the pad upper surface is kept flat for manufacturing simplicity, then the manufacturing process is simplified, but the contact area with conductive connecting member is reduced
Solution Approach 1:
The patent transitions from a two-dimensional flat surface to a three-dimensional surface with elevated and recessed portions. This dimensional change increases the effective contact area with the conductive connecting member by creating vertical variations, while the overall pad footprint and manufacturing process remain relatively simple
3Manufacturing precision
If the pad upper surface has low surface roughness, then the surface quality is improved, but the bonding strength with conductive wire is reduced
Solution Approach 1:
The patent introduces surface curvature through elevated and recessed portions that create controlled roughness. The elevated portions provide protrusions for mechanical interlocking, while the recessed portions create anchoring features, both of which enhance bonding strength with the conductive wire while maintaining overall surface quality
Solution Approach 2:
The patent changes the surface roughness parameter by creating elevated and recessed portions with specific dimensions and distributions. This controlled modification of the roughness parameter enhances friction and mechanical interlocking for stronger bonding, while the changes are implemented within manufacturing capabilities
Data Source
AI summary
A pad structure usable with a semiconductor device may include an insulating layer pattern structure, a plug, and a pad. The insulating layer pattern structure has a plug hole and at least one via hole. The plug is formed in the plug hole. The pad is formed on the insulating layer pattern structure. The pad is electrically connected with the plug and has a lower surface and an uneven upper surface. The lower surface includes a protruded portion inserted into the via hole. The uneven upper surface includes a recessed portion and an elevated portion—to provide high roughness and firm connection.