Semiconductor Passivation Structure With SOG to Prevent Pad Cracking
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Solution Overview
Problem
The conventional semiconductor back-end-of-the-line (BEOL) process faces issues with cracking of passivation layers due to thermal expansion coefficient mismatch between the passivation layers and aluminum pad layers, which are formed at high temperatures.
Innovation Solution
A semiconductor structure is developed with a spin-on glass (SOG) layer covering the pad and first passivation layer, formed at low temperatures, and a second passivation layer deposited on the SOG layer, along with a via plug and liner layer for electrical connectivity, addressing the thermal expansion issue.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If PECVD process is performed at high temperature (over 400 degrees Celsius) to deposit passivation layers, then the passivation layers are successfully formed, but cracking occurs due to thermal expansion coefficient mismatch with aluminum pad layer
Solution Approach 1:
The invention segments the passivation structure into multiple layers: a first passivation layer deposited at high temperature, and a second passivation layer deposited at low temperature on top of it. This segmentation allows each layer to be optimized for different temperature conditions, preventing cracking while maintaining formation quality.
Solution Approach 2:
The invention changes the deposition temperature parameter for different passivation layers. The first passivation layer is deposited at high temperature (over 400°C) using PECVD, while the second passivation layer is deposited at low temperature (not exceeding 400°C) using PECVD or atomic layer deposition (ALD). This parameter change resolves the thermal expansion mismatch issue.
2Manufacturing precision
If PECVD process is used to deposit passivation layers, then conformal coverage is achieved, but high temperature processing causes thermal expansion issues
Solution Approach 1:
The passivation structure is divided into two segments: the first passivation layer provides conformal coverage deposited at high temperature, while the second passivation layer is deposited at low temperature to avoid thermal expansion issues. Each segment serves a specific function optimized for its deposition conditions.
Solution Approach 2:
The deposition temperature parameter is changed between the two passivation layers. The first layer uses high-temperature PECVD for conformal coverage, while the second layer uses low-temperature PECVD or ALD to eliminate thermal expansion problems while maintaining coverage quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The low-temperature formation of the SOG layer improves thermal expansion effects and provides good step coverage, reducing passivation layer cracking and enhancing structural integrity.
Implementation Method 1
A spin-on glass (SOG) layer covering the pad layer and the first passivation layer is formed
Implementation Method 2
the difference in thermal expansion coefficient between the passivation layer and the aluminum pad layer may lead to a cracking problem of the passivation layer
Data Source
AI summary
A semiconductor structure includes a substrate; a top metal layer disposed in a top inter-metal dielectric (IMD) layer on the substrate; a first passivation layer covering the top metal layer and the top IMD layer; a pad layer disposed on the first passivation layer and electrically connected to the top metal layer; a spin-on glass (SOG) layer covering the pad layer and the first passivation layer; and a second passivation layer disposed on the SOG layer.