Semiconductor Device Passive Delay Element Waveform Shaping
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Solution Overview
Problem
High-speed signal transmission in semiconductor devices faces challenges with signal waveform distortion and increased power consumption due to the difficulty in designing digital filter circuits that operate at high clock frequencies, particularly when transmitting signals at 32 Gbps or higher.
Innovation Solution
A semiconductor device is designed with a signal line and a delay element wired-OR coupled to its end, where the delay element shapes the waveform using returning waves, reducing power consumption by employing passive elements instead of active transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a digital filter circuit formed by active elements is used to shape the distorted waveform, then reception performance is improved, but consumption power increases when operating at high clock frequencies (32 GHz and above)
Solution Approach 1:
The patent replaces the active element-based digital filter circuit with a passive element-based delay element. This substitution eliminates the need for power-consuming active components (transistors) while achieving waveform shaping through the passive delay and returning wave mechanism, thereby resolving the contradiction between reception performance and power consumption at high clock frequencies
Solution Approach 2:
The delay element shapes the waveform autonomously by generating returning waves from the transmitted signal itself, without requiring external power supply or active control circuits. The waveform shaping function is achieved through the inherent delay characteristic and signal reflection, making the system self-sufficient and power-efficient
2Speed
If a digital filter circuit operates at high clock frequency (32 GHz and above) to process high-speed signals, then signal transmission speed is improved, but the difficulty level of designing and power consumption increases
Solution Approach 1:
The patent replaces complex active digital filter circuits with a simple passive delay element structure. This substitution dramatically reduces design complexity while maintaining compatibility with high-speed signal transmission, as passive elements do not require complex timing synchronization or power management associated with high-frequency active circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses the increase in power consumption while maintaining high-speed signal transmission by using passive elements to shape waveforms, thereby improving signal reproduction precision and reducing power consumption.
Implementation Method 1
a delay element which wired-OR couples to an end of the signal line and shapes a waveform of a signal at the end of the signal line. A part of a signal from the signal line is transmitted to the delay element, and a returning wave based on the part of the signal supplied is transmitted to the wired-OR coupling part by the delay element. By the operation, the waveform of the signal from the signal line is shaped by the returning wave.
Data Source
AI summary
The present invention provides a semiconductor device realizing suppression of increase in consumption power. A semiconductor device has a signal line, a reception buffer circuit which is coupled to an end of the signal line and to which a signal is supplied from the signal line, and a delay element which is wired-OR coupled to an end of the signal line and shapes a waveform of a signal at the end of the signal line.