Semiconductor Pattern Reduces Capacitance in Display Wiring
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Solution Overview
Problem
Conventional display panels experience undesirable capacitance at intersectional regions between wires, which interferes with signal transmission in the wiring mounting region, making it difficult to form second wires due to abrupt elevations.
Innovation Solution
A semiconductor pattern is disposed between first and second wires in the display substrate's wiring mounting region, reducing capacitance and facilitating the formation of second wires by covering intersectional regions, with optional circular or oval shapes and varying cross-sectional widths to minimize corona discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If wires are densely arranged in the wiring mounting region to increase connectivity, then the number of signal transmission paths increases, but capacitance at intersectional regions increases causing signal interference
Solution Approach 1:
A semiconductor pattern is introduced as an intermediary element between the first wire and second wires at intersectional regions. This semiconductor pattern acts as a mediator that reduces the capacitance coupling between the conductive wires, thereby decreasing signal interference while maintaining the dense wiring arrangement and connectivity.
2Ease of manufacture
If conventional wiring structures are used without semiconductor patterns, then fabrication process is simpler, but abrupt elevations at wire intersections make it difficult to form second wires
Solution Approach 1:
The semiconductor pattern is formed in advance at the intersectional regions before the second wires are deposited. This preliminary action creates a preparatory structure that fills in the abrupt elevations, providing a smoother surface that facilitates the subsequent formation of second wires and improves overall fabrication productivity.
3Object-affected harmful factors
If semiconductor pattern cross-sectional width is increased to better cover intersectional regions, then capacitance reduction is improved, but corona discharge increases
Solution Approach 1:
The semiconductor pattern is designed with a circular or oval cross-sectional shape instead of sharp edges. This curvature eliminates abrupt edges that would otherwise generate corona discharge, while still maintaining sufficient coverage of the intersectional regions to reduce capacitance between the wires.
Data Source
AI summary
The present disclosure provides a display substrate, including: a wiring mounting region. The wiring mounting region includes first wires and second wires, each of the first wires intersecting with one or more of the second wires, thereby defining one or more intersectional regions; and a semiconductor pattern between the first wire and the one or more second wires, the semiconductor pattern having at least one cross-sectional width covering at least a portion of at least one of the intersectional regions.