Semiconductor Pattern Layout With Mandrel Bars for Lithography Accuracy

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Solution Overview

Problem

Conventional optical lithography technologies struggle to accurately print intricate patterns in advanced IC designs, leading to issues like rounding, pinching, necking, bridging, and erosion, which affect device performance and integration, especially in mixed layouts with varying design rules for logic circuits and SRAM cells.

Innovation Solution

A method involving the formation of extended device patterns, addition of dummy patterns outside layout blocks, and insertion of mandrel bar patterns to connect these, followed by mask fabrication and subsequent processing to form fin structures, enhancing pattern density and preventing space violations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional optical lithography is used to print patterns at 32 nm node and below, then manufacturing process is simple, but pattern accuracy deteriorates due to resolution limits causing rounding, pinching, necking, bridging, and erosion

Engineering Contradiction:
Improvepattern accuracyVSAvoidlithography process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The layout is divided into multiple layout blocks, each with its own set of restricted design rules (RDRs). This segmentation allows different regions to be optimized for their specific printing requirements, with each block containing patterns designed according to RDRs that improve image printing quality through constructive light interference

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dummy patterns are added around the periphery of layout blocks before the actual patterning process. These dummy patterns serve as preliminary structures that improve mandrel uniformity and prevent space violations during subsequent manufacturing steps, addressing potential printing inaccuracies before they occur

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If multiple layout blocks with different RDRs are used to accommodate various IC components, then pattern printing quality improves for each block, but manufacturing complexity increases due to multiple design rule sets and spacing requirements

Engineering Contradiction:
Improveimage printing qualityVSAvoidlayout block management complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The mandrel bar structure serves multiple functions simultaneously: it connects device patterns to dummy patterns, provides spacing between layout blocks, improves mandrel uniformity during fabrication, and prevents space violations. This multi-functional element simplifies the overall manufacturing process despite the presence of multiple layout blocks with different design rules

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If layout blocks are placed closer together to increase device integration, then productivity improves, but manufacturing precision deteriorates due to printing inaccuracies like line end rounding and spacing violations

Engineering Contradiction:
Improvedevice integration densityVSAvoidpattern spacing accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Mandrel bars are introduced as intermediary structures between device patterns and dummy patterns, and between adjacent layout blocks. These mandrel bars act as mediators that maintain proper spacing and connectivity, enabling higher device integration while preventing printing inaccuracies such as line end rounding and spacing violations through their carefully designed positioning and dimensions

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12423496B2Methods for forming pattern layout, mask, and semiconductor structure
Publication Date: 2025.09.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12423496B2 patent drawing
  • US12423496B2 patent drawing
  • US12423496B2 patent drawing

AI summary

A method for forming a pattern layout is provided, including receiving an IC design layout including a layout block, a first line pattern is disposed inside the layout block along the first direction; forming a second line pattern disposed outside the layout block parallel to the first line patterns; forming a mandrel bar pattern oriented along the second direction and overlapping the first line pattern and the second line pattern, the mandrel bar pattern is between the first edge and the third edge of the layout block that are parallel to the first direction, and a first end of the mandrel bar pattern is separated from the first edge and overlaps a first side edge of one of the first line pattern or the second line pattern closest to the first edge; and outputting a pattern layout.