Semiconductor Device Photomask Misalignment Correction
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Solution Overview
Problem
In semiconductor devices with stacked structures, stress-induced misalignment and poor connection occur between different hierarchies due to differences in structure and material properties, leading to misalignment and connection issues between contacts, wirings, and plugs across various layers.
Innovation Solution
The use of a photomask with adjusted geometric center intervals and correction factors to align contact and plug positions, allowing for partial misalignment correction by less than 100% to maintain connection integrity without increasing device size, employing a method where the distance between geometric centers of contacts and plugs differs across positions, and using multiple photomasks for forming contacts, wirings, and plugs to ensure accurate positioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If stress-induced misalignment is corrected by adjusting photomask geometric centers, then connection reliability improves, but device complexity increases
Solution Approach 1:
The photomask geometric centers are pre-adjusted to predicted misalignment positions based on stress modeling before the actual semiconductor manufacturing process. This preliminary correction compensates for expected stress-induced shifts, ensuring that contacts align with plugs despite stress effects during fabrication.
Solution Approach 2:
The geometric center positions of the photomask are modified from their standard locations to account for stress-induced misalignment. By changing the photomask parameters (geometric center coordinates), the system compensates for stress effects and maintains alignment accuracy without requiring complex real-time adjustment mechanisms.
2Reliability
If partial misalignment correction by less than 100% is applied, then connection integrity is maintained, but alignment precision is reduced
Solution Approach 1:
Instead of applying 100% misalignment correction, the patent applies a partial correction (less than 100%) to the photomask geometric centers. This partial action is sufficient to maintain connection integrity while avoiding over-correction that would compromise alignment precision. The optimal correction percentage is determined through modeling and experimentation.
Data Source
AI summary
A semiconductor device of an embodiment includes first and second structures arranged in a first hierarchy, in which the first and second structures are repeatedly arranged in a first direction along a plane of the first hierarchy, and a distance between geometric centers of the first and second structures in a minimum unit of repetition of the first and second structures differs between a first position and a second position in the first direction.