Semiconductor Device Pillar Insulator Structure

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional lateral IGBTs face a tradeoff between output characteristics and withstand voltage characteristics, where improving one typically results in a loss of the other, limiting their overall performance.

Innovation Solution

A semiconductor device design featuring a P-type base region, N-type emitter region, P-type collector region, and a pillar-shaped insulator structure within the N-type semiconductor layer, which enhances output characteristics without compromising withstand voltage by controlling carrier flow and density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If the saturation voltage between collector and emitter is lowered to decrease loss, then output characteristics are improved, but the withstand voltage between collector and emitter is reduced

Engineering Contradiction:
ImprovelossVSAvoidwithstand voltage
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The drift region is divided into multiple segments by inserting insulating films at different depths, creating a multi-level segmentation structure. This segmentation allows the drift region to be effectively elongated while maintaining controlled carrier flow, thereby improving output characteristics without sacrificing withstand voltage characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a vertical dimension to the drift region by forming insulating films at different depth positions within the drift region. This dimensional change creates multiple drift region segments stacked vertically, effectively increasing the drift length in the depth direction and improving both output and withstand voltage characteristics simultaneously.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If the withstand voltage between collector and emitter is raised to increase margin to destruction, then output characteristics deteriorate due to increased saturation voltage

Engineering Contradiction:
Improvewithstand voltageVSAvoidoutput characteristics
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The insulating films are strategically positioned at specific depth locations within the drift region, creating local quality variations. The first insulating film is formed at a first depth position while the second insulating film is formed at a second depth position, allowing different regions of the drift region to serve different functions in carrier flow control.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The insulating films are pre-formed within the drift region before final device operation. This preliminary action of creating the segmented structure with insulating films at predetermined depths enables the drift region to inherently control carrier flow and maintain optimal electrical characteristics during device operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9929259B2Semiconductor device and manufacturing method for semiconductor device
Publication Date: 2018.03.27 LAPIS SEMICON CO LTD
  • US9929259B2 patent drawing
  • US9929259B2 patent drawing
  • US9929259B2 patent drawing

AI summary

A semiconductor device including: a P-type base region provided; an N-type emitter region provided inside the P-type base region; a P-type collector region that is provided on the surface layer portion of the N-type semiconductor layer and is separated from the P-type base region; a gate insulating film that is provided on the surface of the N-type semiconductor layer, and that contacts the P-type base region and the N-type emitter region; a gate electrode on the gate insulating film; a pillar shaped structure provided inside the N-type semiconductor layer between the P-type base region and the P-type collector region, wherein one end of the pillar shaped structure is connected to an N-type semiconductor that extends to the surface layer portion of the N-type semiconductor layer, and the pillar shaped structure includes an insulator extending in a depth direction of the N-type semiconductor layer.