Semiconductor Conductive Pillar Undercut Control via Passivation
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Solution Overview
Problem
Conventional semiconductor structures face issues with overlarge undercut during etching, leading to inadequate support for copper pillars and decreased product reliability in flip-chip packages.
Innovation Solution
A method involving a chip with conductive pads and a protective layer, where a metal layer is formed and electrically connected to the pads, followed by the creation of a passivation layer with openings to expose the metal layer, allowing for the formation of conductive pillars that are supported by the passivation layer, thereby preventing excessive undercut during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If isotropic etching liquid is used to remove exposed copper layer and titanium layer, then etching process is simple, but overlarge undercut occurs leading to inadequate support for copper pillars
Solution Approach 1:
The patent applies local quality by forming a first passivation layer selectively on the titanium layer surrounding the copper pillars, while leaving the copper layer exposed in specific areas. This creates different protective qualities in different locations: the passivation layer prevents undercut in critical areas while allowing etching access where needed. The selective placement of the passivation layer enables precise control over where undercut occurs and where it is prevented, resolving the contradiction between simple isotropic etching and precise undercut control.
2Device complexity
If copper pillars are formed without passivation layer protection, then fabrication process is simplified, but product reliability decreases due to overlarge undercut
Solution Approach 1:
The patent applies preliminary action by forming the first passivation layer on the titanium layer before performing the etching process to remove the copper layer. This preliminary protective action prevents the undercut problem from occurring in the first place, rather than trying to correct it afterward. The passivation layer is prepared in advance to provide the necessary support and protection for the copper pillars during the subsequent etching and reflow processes, thereby improving reliability without significantly complicating the overall fabrication flow.
3Ease of manufacture
If titanium layer is removed completely to expose copper pillars, then conductive bump formation is facilitated, but copper pillar support is insufficient leading to deformation
Solution Approach 1:
The patent applies local quality by selectively removing the copper layer in specific areas while maintaining the titanium layer with passivation layer protection in areas where structural support is needed. This creates a differentiated structure: copper is exposed where electrical connection is required, while titanium with passivation layer remains where mechanical support is critical. The local differentiation resolves the contradiction between facilitating conductive bump formation and maintaining copper pillar support strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of the conductive bump by preventing overlarge undercut, ensuring sufficient support for the pillars and improving the accuracy and reliability of the semiconductor structure's electrical connection.
Implementation Method 1
forming a metal layer on the protective layer, and electrically connecting the metal layer to the conductive pads
Implementation Method 2
forming a metal layer on the protective layer, and electrically connecting the metal layer to the conductive pads
Implementation Method 3
the incident of inward etching would occur because there is isotropy if using etching liquid to etch
Data Source
AI summary
The present invention provides a semiconductor structure and a method of fabricating the same. The method includes: providing a chip having conductive pads, forming a metal layer on the conductive pads, forming a passivation layer on a portion of the metal layer, and forming conductive pillars on the metal layer. Since the metal layer is protected by the passivation layer, the undercut problem is solved, the supporting strength of the conductive pillars is increased, and the product reliability is improved.