Semiconductor Pin Diode with Segmented P-Regions
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Solution Overview
Problem
Current semiconductor devices, particularly free-wheeling diodes used in inverters and power converters, face challenges in reducing reverse recovery time, ON-state voltage, and safe operation region, which affect their performance and reliability.
Innovation Solution
The semiconductor device incorporates a pin diode structure with a channel region and p+-type semiconductor regions, which are strategically positioned and doped to enhance electron flow and suppress hole injection, thereby improving recovery speed and increasing the safe operation region during reverse recovery.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional diode structure is used, then the device is simple to manufacture, but the reverse recovery time is long
Solution Approach 1:
The diode is segmented into multiple functional regions: a pin diode structure with intrinsic layer divided into first and second intrinsic layers, and p-type semiconductor regions divided into first and second p-type regions. This segmentation allows each region to be optimized for specific functions, reducing reverse recovery time while maintaining manufacturability
Solution Approach 2:
Different regions of the diode are given different local properties: the first p-type region has higher impurity concentration than the second p-type region, and the intrinsic layers have different doping characteristics. This local quality differentiation optimizes carrier extraction and reduces reverse recovery time without requiring complete structural redesign
2Loss of energy
If the impurity concentration is increased to reduce ON-state voltage, then the conducting performance improves, but the reverse recovery characteristics deteriorate
Solution Approach 1:
The diode employs non-uniform impurity concentration distribution with a first p-type region having higher concentration than the second p-type region. This local quality variation allows the high-concentration region to provide low ON-state voltage while the low-concentration region maintains fast reverse recovery characteristics
Solution Approach 2:
The p-type semiconductor regions are segmented into multiple zones with different impurity concentrations, allowing independent optimization of each zone for either low-conduction loss or fast reverse recovery, thereby resolving the trade-off between these two parameters
3Speed
If the recovery time is shortened to improve power converter performance, then the switching speed increases, but the safe operation region decreases
Solution Approach 1:
The pin diode structure with its intrinsic layers is designed to preliminary extract carriers before reverse recovery occurs. The first and second intrinsic layers act as carrier extraction zones that prepare the device for rapid recovery while maintaining safe operation margins through controlled carrier distribution
Solution Approach 2:
Different regions are optimized for different aspects of recovery: the first p-type region with higher impurity concentration provides strong carrier extraction for fast recovery speed, while the second p-type region with lower concentration maintains wider depletion regions for expanded safe operation region during recovery
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces reverse current leakage, suppresses avalanche effects, and increases the breakage resistance of the semiconductor device, leading to improved performance and reliability in power converter applications.
Implementation Method 1
p+-type semiconductor regions, which are strategically positioned and doped to enhance electron flow and suppress hole injection
Implementation Method 2
channel region and p+-type semiconductor regions, which are strategically positioned and doped to enhance electron flow
Implementation Method 3
suppresses avalanche effects, and increases the breakage resistance of the semiconductor device
Data Source
AI summary
According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, and a fourth semiconductor region. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the first semiconductor region and the second electrode, is provided beside the second semiconductor region in a second direction crossing a first direction from the first electrode toward the second electrode, and a portion of the first semiconductor region is positioned between the third and second semiconductor regions. The fourth semiconductor region is provided between the portion of the first semiconductor region and the second electrode and has a greater impurity concentration than the second and third semiconductor regions.