Structurally-Reinforced Semiconductor Plug for 3D Memory
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Solution Overview
Problem
The existing fabrication methods for 3D memory devices result in structurally weakened semiconductor plugs, leading to non-uniform lateral dimensions and increased risk of yield loss and reliability issues due to over-etching, which can cause collapse of memory cells.
Innovation Solution
A method involving the formation of a dielectric stack with interleaved layers, creation of a vertically extending opening, and subsequent formation of shallow recesses using an etchant with high selectivity for sacrificial layers, followed by epitaxial growth of semiconductor plugs with protruding parts, which are then trimmed to maintain uniform lateral dimensions, ensuring structural reinforcement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If existing fabrication methods are used to form semiconductor plugs, then the manufacturing process is simple, but the semiconductor plugs become structurally weakened with non-uniform lateral dimensions
Solution Approach 1:
The method performs preliminary actions by forming shallow recesses in the sacrificial layer before depositing the semiconductor plug material. This preliminary structuring of the mold cavity ensures that the resulting plug has a uniform lateral dimension after processing, preventing structural weakening that would occur with conventional methods.
Solution Approach 2:
The invention applies local quality by creating shallow recesses only at specific locations where the sacrificial layer abuts the sidewall of the opening, rather than uniformly modifying the entire structure. This localized modification ensures uniform plug dimensions only where needed, maintaining structural integrity without unnecessary complexity elsewhere.
2Productivity
If over-etching occurs during fabrication, then the manufacturing process is fast, but the semiconductor plugs collapse leading to yield loss
Solution Approach 1:
The method provides beforehand cushioning by forming shallow recesses in the sacrificial layer prior to semiconductor plug formation. These recesses create a buffer zone that prevents over-etching from compromising the plug structure, thereby maintaining reliability while allowing fast fabrication processes to proceed without causing collapse.
Solution Approach 2:
The invention applies preliminary anti-action by pre-forming shallow recesses that counteract the harmful effects of subsequent over-etching. This preliminary protective structure prevents the sidewall profile changes that would otherwise lead to plug collapse, enabling high-speed manufacturing without sacrificing structural integrity.
3Ease of manufacture
If the lateral dimension of semiconductor plug varies along vertical direction, then the fabrication process is simple, but the electrical contact is compromised
Solution Approach 1:
The method performs preliminary action by forming shallow recesses in the sacrificial layer before depositing the semiconductor plug material. This preliminary structuring ensures that the plug maintains a uniform lateral dimension throughout its vertical extent, guaranteeing reliable electrical contact while keeping the overall fabrication approach straightforward.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method ensures a structurally reinforced semiconductor plug with uniform lateral dimensions, enhancing the reliability and yield of 3D memory devices by preventing sidewall profile changes and maintaining electrical contact throughout the fabrication process.
Implementation Method 1
A shallow recess is formed by removing a part of a sacrificial layer abutting a sidewall of the opening
Implementation Method 2
A semiconductor plug is formed at a lower portion of the opening
Data Source
AI summary
Embodiments of 3D memory devices with a structurally-reinforced semiconductor plug and methods for forming the same are disclosed. In an example, a method for forming a 3D memory device is disclosed. A dielectric stack is formed on a substrate. The dielectric stack includes a plurality of interleaved dielectric layers and sacrificial layers. An opening extending vertically through the dielectric stack is formed. A shallow recess is formed by removing a part of a sacrificial layer abutting a sidewall of the opening. The sacrificial layer is at a lower portion of the dielectric stack. A semiconductor plug is formed at a lower portion of the opening. A part of the semiconductor plug protrudes into the shallow recess. A channel structure is formed above and in contact with the semiconductor plug in the opening. A memory stack including a plurality of conductor/dielectric layer pairs is formed by replacing, with a plurality of conductor layers, the sacrificial layers in the dielectric stack.