Semiconductor Plug Formation via Thermal Expansion and Single CMP
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Solution Overview
Problem
The existing methods for manufacturing semiconductor devices require multiple chemical mechanical polishing (CMP) processes to form plugs, which are time-consuming and complex.
Innovation Solution
A method that involves forming a preliminary plug with a dimple in a semiconductor chip, expanding it through thermal treatment, and using a single CMP process to create a plug without protrusions, thereby simplifying the process and reducing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple CMP processes are used to form a plug, then the plug can be formed with proper dimensions, but the manufacturing process becomes complicated and time-consuming
Solution Approach 1:
The patent applies preliminary action by forming a dimple structure in the preliminary plug before thermal treatment. This dimple is pre-designed to accommodate the expected thermal expansion of the plug material, so that after thermal treatment, the plug expands into the dimple and achieves the target dimensions without requiring subsequent CMP processes to remove protrusions.
Solution Approach 2:
The patent utilizes parameter changes by controlling the thermal treatment temperature and duration to achieve precise expansion of the plug material into the dimple. By adjusting thermal treatment parameters, the plug expands to fill the dimple completely, achieving the desired final dimensions and eliminating the need for multiple CMP processes.
2Manufacturing precision
If multiple CMP processes are used to form a plug, then the plug can be formed with proper dimensions, but the manufacturing time increases
Solution Approach 1:
The dimple structure is formed in advance during the preliminary plug formation stage, anticipating the thermal expansion that will occur later. This preliminary design of the dimple geometry allows the plug to self-adjust to the correct dimensions after thermal treatment, eliminating the need for time-consuming post-treatment CMP processes.
Solution Approach 2:
The plug material performs self-service by automatically expanding into the dimple structure during thermal treatment. This self-adjustment mechanism allows the plug to achieve its final dimensions through its own thermal expansion properties, without requiring external mechanical removal processes like CMP.
3Ease of manufacture
If a preliminary plug is formed without a dimple, then the plating process is simpler, but the plug will have protrusions after thermal treatment requiring additional CMP processes
Solution Approach 1:
The dimple structure is incorporated during the preliminary plug formation stage, serving as a pre-designed compensation feature. This preliminary action ensures that when thermal expansion occurs, the plug material has a predetermined space to expand into, preventing surface protrusions and maintaining surface flatness without complicating the plating process.
Solution Approach 2:
The dimple creates a localized region of different geometry within the plug structure. This local quality change concentrates the thermal expansion into a specific region (the dimple), allowing the rest of the plug surface to remain flat and properly dimensioned, thus maintaining overall manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the formation of a plug using a single CMP process, eliminating the need for multiple CMP steps and reducing processing time, while ensuring the plug is fully integrated within the semiconductor chip without protrusions.
Implementation Method 1
The preliminary plug may be expanded into the dimple by a thermal treatment process to form a plug
Data Source
AI summary
In a method of manufacturing a semiconductor device, a front end of line (FEOL) process may be performed on a semiconductor substrate to form a semiconductor structure. A back end of line (BEOL) process may be performed on the semiconductor substrate to form a wiring structure electrically connected to the semiconductor structure, thereby formed a semiconductor chip. A hole may be formed through a part of the semiconductor chip. A preliminary plug may have a dimple in the hole. The preliminary plug may be expanded into the dimple by a thermal treatment process to form a plug. Thus, the plug may not have a protrusion protruding from the upper surface of the semiconductor chip, so that the plug may be formed by the single CMP process.