Semiconductor Power Device Package with Dual-Side Cooling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The manufacturing of compact, high-thermal-efficiency power MOSFET packages with adequate electrical insulation and heat dissipation is challenging due to their extremely compact dimensions and small spaces, particularly in horizontal SMD-type packages.
Innovation Solution
A semiconductor power device package with dual-side cooling and electrical insulation limited to the top side, utilizing a leadframe with a metal frame and insulating encapsulation, and an insulation multilayer stack with copper and ceramic layers for electrical insulation and heat dissipation, along with a source clip design that provides high separation distances between leads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If compact dimensions are used to reduce package size, then the thickness is reduced, but manufacturing becomes problematical due to extremely compact dimensions and small spaces
Solution Approach 1:
The patent transitions from traditional vertical package orientation to a horizontal SMD-type configuration, changing the primary dimension of compactness from height to thickness. This dimensional reorientation allows the package to achieve compact form factor while maintaining adequate internal spaces for manufacturing processes and heat dissipation pathways.
Solution Approach 2:
The package structure is divided into distinct functional zones with clearly defined separation distances between gate, source, and drain terminals. This segmentation allows each terminal region to be independently managed during manufacturing while ensuring adequate electrical insulation and heat dissipation in compact overall dimensions.
2Reliability
If separation distance between leads is increased to ensure electrical insulation, then insulation voltage is improved, but package dimensions increase
Solution Approach 1:
The package employs localized insulation structures and materials positioned precisely where electrical insulation is critical between leads. Rather than uniformly increasing all dimensions, the design concentrates insulation measures in specific high-stress regions, achieving high insulation voltage capability while maintaining compact overall package size.
3Loss of energy
If heat dissipation is improved towards the outside, then thermal efficiency is improved, but package structure complexity increases
Solution Approach 1:
The package design integrates multiple functions into unified structures: the bottom surface serves both as a mechanical mounting interface and a heat dissipation pathway, while the leadframe structure simultaneously provides electrical connectivity and thermal conduction. This multi-functionality approach improves heat dissipation efficiency without proportionally increasing structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables compact packages with effective heat dissipation, high electrical insulation, and low on-state resistance, suitable for applications requiring high insulation voltages, such as automotive and energy conversion fields, while maintaining reliability and affordability.
Implementation Method 1
an insulation multilayer stack with copper and ceramic layers for electrical insulation and heat dissipation
Implementation Method 2
utilizing a leadframe with a metal frame and insulating encapsulation
Data Source
AI summary
A semiconductor power device has: a die, with a front surface and a rear surface, and with an arrangement of projecting regions on the front surface, which define between them windows arranged within which are contact regions; and a package, which houses the die inside it. A metal frame has a top surface and a bottom surface; the die is carried by the frame on the top surface; an encapsulation coating coats the frame and the die. A first insulation multilayer is arranged above the die and is formed by an upper metal layer, a lower metal layer, and an intermediate insulating layer; the lower metal layer is shaped according to an arrangement of the projecting regions and has contact projections, which extend so as to electrically contact the contact regions, and insulation regions, interposed between the contact projections, in positions corresponding to the projecting regions.


