Semiconductor Power Device Passivation Layers
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Solution Overview
Problem
Semiconductor power devices are sensitive to High Temperature Reverse Bias (HTRB) and Humidity test conditions, leading to premature failures due to poor design, inconsistent process control, and passivation issues, resulting in increased leakage current.
Innovation Solution
The use of a Plasma Enhanced Chemical Vapor Deposition (PECVD) oxide as a passivation layer, combined with a polymide layer, to form a robust power device structure that includes specific field plate configurations to enhance reliability under extreme conditions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional passivation layers are used, then device fabrication is simpler, but device reliability under HTRB and Humidity test conditions deteriorates
Solution Approach 1:
The passivation layer is divided into multiple distinct layers: a first passivation layer (PECVD oxide, 0.5-2 microns thick) directly on the substrate, and a second passivation layer (polymide, 3-20 microns thick) overlying the first layer. This segmentation allows each layer to perform specific functions - the PECVD oxide provides excellent interface quality and field control, while the polymide provides robust moisture barrier protection, together achieving superior reliability under HTRB and Humidity test conditions.
Solution Approach 2:
The patent employs a composite passivation structure combining PECVD oxide and polymide materials. The PECVD oxide layer provides excellent electrical properties and interface quality, while the polymide layer provides superior moisture barrier properties. This composite approach leverages the complementary strengths of different materials to achieve both electrical performance and environmental reliability that neither material could provide alone.
2Object-affected harmful factors
If passivation layer thickness is increased, then moisture resistance improves, but leakage current increases
Solution Approach 1:
The total passivation thickness is segmented between two functional layers. The first PECVD oxide layer (0.5-2 microns) provides optimal electrical properties and interface quality with thin enough thickness to minimize leakage. The second polymide layer (3-20 microns) provides the bulk of the moisture barrier function. This segmentation allows the moisture-resistant layer to be thick without forcing the electrically-critical layer to be equally thick, thus maintaining low leakage current while achieving excellent moisture resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The PECVD oxide and polymide passivation layers provide consistent device characteristics, reducing leakage current and ensuring robust performance during HTRB and Humidity tests, thereby improving the reliability of semiconductor power devices.
Implementation Method 1
an oxide layer overlying the substrate, the oxide layer formed using a Plasma Enhanced Chemical Vapor deposition (PECVD) method
Data Source
AI summary
A semiconductor power device comprises a semiconductor substrate. The substrate includes an N-type silicon region and N+ silicon region. An oxide layer overlies the N− type silicon region, the oxide layer formed using a Plasma Enhanced Chemical Vapor deposition (PECVD) method. First and second electrodes are coupled to the N− type silicon region and the N+ type silicon region, respectively. The oxide layer has a thickness 0.5 to 3 microns. The power device also includes a polymide layer having a thickness of 3 to 20 microns; a first field plate overlying the oxide layer; and second field plate overlying the polymide layer and the first field plate, wherein the second field plate overlaps the first field plate by 2 to 15 microns.