Semiconductor Power Device Shielded Gate ESD Clamp Diode

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Solution Overview

Problem

The existing manufacturing process for semiconductor power devices with shielded gate structures and ESD clamp diodes requires multiple poly-silicon layers and masks, making it costly and complex for mass production without optimizing performance characteristics like Cgd and breakdown voltage.

Innovation Solution

A semiconductor power device design that uses only two poly-silicon layers, where the first layer forms both the shielded electrode and ESD clamp diode, and the second layer forms the gate electrode, with a simplified mask process that defines both structures simultaneously, enhancing stability and reducing manufacturing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If three poly-silicon layers are used to form shielded electrode, gate electrode and ESD clamp diode separately, then device performance is improved, but manufacturing cost and process complexity increase

Engineering Contradiction:
Improvedevice performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the ESD clamp diode electrode and shielded electrode into a single poly-silicon layer, while keeping the gate electrode in a separate layer. This merging reduces the total number of poly-silicon layers from three to two, simplifying the manufacturing process while maintaining the functional performance of both the shielded gate structure and ESD protection

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The first poly-silicon layer serves dual functions as both the shielded electrode and the ESD clamp diode electrode. This multi-functionality allows a single layer to perform multiple roles, reducing process complexity and manufacturing cost while preserving device performance characteristics

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If multiple masks are used to define shielded gate structure and ESD clamp diode areas separately, then manufacturing precision is improved, but productivity decreases and cost increases

Engineering Contradiction:
Improvepattern definition precisionVSAvoidmass production efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent merges the mask patterns for the shielded gate structure and ESD clamp diode into a single mask process. By designing the first poly-silicon layer to simultaneously form both the shielded electrode and ESD clamp diode electrode, only one mask is needed instead of two separate masks, improving productivity and reducing cost while maintaining manufacturing precision

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single mask serves multiple functions by defining both the shielded gate structure area and the ESD clamp diode area in one step. This universal mask approach enables mass production efficiency while maintaining the required pattern definition precision for both structures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9953969B2Semiconductor power device having shielded gate structure and ESD clamp diode manufactured with less mask process
Publication Date: 2018.04.24 FORCE MOS TECH CO LTD
  • US9953969B2 patent drawing
  • US9953969B2 patent drawing
  • US9953969B2 patent drawing

AI summary

A semiconductor power device having shielded gate structure in an active area and having ESD clamp diode with two poly-silicon layer process is disclosed, wherein: the shielded gate structure comprises a first poly-silicon layer to serve as a shielded electrode and a second poly-silicon layer to serve as a gate electrode, and the ESD clamp diode formed between two protruding electrodes is also formed by the first poly-silicon layer. A mask specially used to define the ESD clamp diode portion is saved.