Semiconductor Power Line Capacitive Coupling for Noise Reduction

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Solution Overview

Problem

Semiconductor devices face noise issues due to resonance current generated between power lines, despite separate power supply lines for output and pre-stage circuits, as inductance components cause potential differences leading to noise generation.

Innovation Solution

Incorporating capacitive elements between power lines for the output and pre-stage circuits to maintain constant potential differences, reducing noise by ensuring the capacitance of these elements is sufficient to manage impedance and resonance frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If separate power lines are provided for output circuit and pre-stage circuit, then noise from pre-stage circuit reaching output circuit is prevented, but resonance current is generated due to inductance components between lines causing potential difference variation and noise

Engineering Contradiction:
Improvenoise from pre-stage circuitVSAvoidresonance current noise
Core Design Contradiction:
Object-affected harmful factorsVSObject-generated harmful factors

Solution Approach 1:

A capacitive element is introduced as an intermediary component connected between the first power line (supplying output circuit) and the third power line (supplying pre-stage circuit). This capacitor acts as a mediator to suppress resonance current by providing a low-impedance path for high-frequency noise, thereby preventing potential difference variation and noise generation between the separate power lines.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the electrical parameters of the power supply system by adding a capacitive element with specific capacitance value. This modifies the impedance characteristics of the power lines, transforming the resonant circuit behavior and reducing the Q-factor of the resonance, thereby suppressing resonance current and stabilizing potential differences between power lines.

Inventive Principle:
Principle #35Parameter changes

2Object-generated harmful factors

If capacitive elements are added between power lines to reduce resonance current, then noise is reduced, but device complexity increases

Engineering Contradiction:
Improveresonance current noiseVSAvoidpower line configuration
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The capacitive element is strategically placed at a specific location where it can most effectively suppress resonance current - between the first and third power lines that are prone to mutual interference. This localized approach targets the specific problem area without requiring comprehensive modification of the entire power distribution system, thereby minimizing added complexity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces noise between different power supplies by maintaining stable potential differences, as demonstrated by reduced impedance and noise waveform variations, thereby enhancing signal handling in semiconductor devices.

Implementation Method 1

provision of capacitive elements among a plurality of lines for supplying power to circuits prevents variation in the difference in potential between the lines

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8853822B2Semiconductor device
Publication Date: 2014.10.07 LONGITUDE LICENSING LTD
  • US8853822B2 patent drawing
  • US8853822B2 patent drawing
  • US8853822B2 patent drawing

AI summary

A semiconductor device according to this invention includes a first power line that supplies power to a first circuit, a second power line that supplies power to a second circuit, and a capacitive element that is provided between the first power line and the second power line.