Semiconductor Power Rail Structure With Insulating Leakage Isolation
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Solution Overview
Problem
The integration of gate-all-around (GAA) transistors in semiconductor manufacturing is challenging due to complexity in fabricating the gate structure around the nanowire, leading to issues like increased leakage and resistance in power transmission.
Innovation Solution
A semiconductor structure with a backside power rail architecture and insulating strips replacing dummy gate structures, reducing leakage and improving manufacturing yield by using a backside power rail architecture and replacing dummy gate structures with insulating strips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional GAA fabrication methods are used to integrate gate structures around nanowires, then gate control is improved, but manufacturing complexity increases and leakage problems occur
Solution Approach 1:
The method forms sacrificial layers and dummy gate structures in advance before final gate formation. The sacrificial layers are deposited and patterned first, followed by dummy gate structures that guide subsequent processing. This preliminary structuring simplifies the complex task of integrating gates around nanowires by providing pre-defined pathways and protection layers.
Solution Approach 2:
The patent introduces dummy gate structures as intermediary elements that facilitate the integration process. These dummy gates serve as temporary structures that enable proper gate alignment and protection during manufacturing, and are later replaced or integrated with the final gate structure. This intermediary approach reduces manufacturing complexity by breaking down the complex integration into manageable steps.
2Ease of manufacture
If conventional power transmission routing is used, then manufacturing is simpler, but resistance and leakage increase
Solution Approach 1:
The patent implements backside power rail architecture that routes power transmission lines through the substrate backside rather than through the frontside metal layers. This dimensional change from planar routing to vertical/through-routing reduces the number of metal layers required and decreases resistance by providing direct power paths, while maintaining manufacturing feasibility through adapted fabrication processes.
3Ease of manufacture
If dummy gate structures are retained, then manufacturing alignment is easier, but leakage between power regions increases
Solution Approach 1:
The patent removes or replaces dummy gate structures in regions where they would create leakage paths between power transmission cell regions. By extracting these potentially harmful structures and replacing them with insulating strips or removing them entirely, the design eliminates leakage current while maintaining manufacturing alignment through the preserved dummy gate structures in non-power regions.
Solution Approach 2:
The patent applies different treatments to dummy gate structures in different locations. In power transmission cell regions, dummy gates are removed or replaced with insulating strips to prevent leakage. In other regions, dummy gates are retained to provide alignment guidance. This localized differentiation eliminates harmful leakage while preserving manufacturing benefits where applicable.
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a functional cell region including an n-type functional transistor and a p-type functional transistor. The semiconductor structure also includes a first power transmission cell region including a first cutting feature and a first contact rail in the first cutting feature. The semiconductor structure also includes a first power rail electrically connected to a source terminal of the p-type functional transistor and the first contact rail of the first power transmission cell region. The semiconductor structure also includes a second power transmission cell region adjacent to the first power transmission cell and including a second cutting feature and second contact rail in the second cutting feature. The semiconductor structure also includes an insulating strip extending from the first cutting feature to the second cutting feature in a first direction.