Semiconductor Power Switching Layout With iRDLs for Low Wiring Resistance

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Solution Overview

Problem

In semiconductor devices like DRAM, the wiring resistance from an external power supply terminal to the switch circuit is high, which affects the efficiency and speed of operation voltage switching.

Innovation Solution

The use of inline redistribution layers (iRDLs) and via conductors with specific layouts and configurations, such as alternately arranged power selector circuits and larger via conductors, reduces the wiring resistance by optimizing the layout and arrangement of power supply lines and switch circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If conventional wiring layout is used, then device structure is simple, but wiring resistance from external power supply terminal to switch circuit is high

Engineering Contradiction:
Improvewiring resistanceVSAvoidwiring layout complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent introduces inline redistribution layers (iRDLs) that extend in the X-direction, creating an additional dimensional pathway for power delivery. This allows power to be distributed along the length of the circuit block rather than only from external terminals, effectively adding a spatial dimension to the power distribution network and reducing resistance without significantly increasing overall device complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces intermediate power distribution structures (iRDLs and via conductors) that act as mediators between external power supply terminals and switch circuits. These intermediary elements distribute power locally throughout the circuit block, reducing the distance and resistance between power sources and load elements without requiring complete redesign of the external terminal connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If wiring resistance is reduced through optimized layout, then power supply efficiency improves, but manufacturing complexity increases

Engineering Contradiction:
Improvepower supply efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent segments the power distribution function into multiple independent components: external power terminals, via conductors connecting different layers, inline redistribution layers for lateral power distribution, and local power delivery to switch circuits. This segmentation allows each component to be optimized independently and manufactured using standard semiconductor fabrication processes, improving power supply efficiency without excessive manufacturing complexity.

Inventive Principle:
Principle #1Segmentation

3Loss of energy

If larger via conductors are used to reduce resistance, then wiring resistance decreases, but device area increases

Engineering Contradiction:
Improvewiring resistanceVSAvoiddevice area
Core Design Contradiction:
Loss of energyVSArea of stationary object

Solution Approach 1:

Instead of increasing via conductor size in the vertical dimension, the patent extends power distribution in the lateral dimension using inline redistribution layers. This dimensional shift allows power to reach distant circuits through extended planar conductors rather than requiring larger vertical via conductors, thus reducing resistance without proportionally increasing device area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11783886B2Semiconductor device capable of switching operation voltage
Publication Date: 2023.10.10 MICRON TECHNOLOGY INC
  • US11783886B2 patent drawing
  • US11783886B2 patent drawing
  • US11783886B2 patent drawing

AI summary

Disclosed herein is an apparatus that includes: a driver circuit configured to operate on a power voltage supplied from an internal power supply line; a first external power supply line supplied with a first external power voltage; a second external power supply line supplied with a second external power voltage; a plurality of first switch circuits coupled between the first external power supply line and the internal power supply line, the plurality of first switch circuits being arranged on a plurality of first circuit areas; and a plurality of second switch circuits coupled between the second external power supply line and the internal power supply line, the plurality of second switch circuits being arranged on a plurality of second circuit areas. The plurality of first circuit areas and the plurality of second circuit areas are arranged in a first direction in a predetermined order.