Semiconductor Power Supply Wiring Notches Reduce Parasitic Capacitance
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Solution Overview
Problem
In semiconductor devices, particularly those using standard cells, the layout of wirings and elements differs significantly based on circuit functions and characteristics, making it difficult to apply techniques for reducing parasitic capacitances, which can lead to unintended large parasitic capacitances in signal wirings due to meshed power supply wirings.
Innovation Solution
The semiconductor device incorporates power supply wirings with notches in regions where they intersect signal wirings, and forms power supply wirings into a meshed shape with varying widths, using through-hole conductors to connect power supply wirings across layers, thereby reducing parasitic capacitances and improving signal quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If meshed power supply wirings are formed to fill vacant spaces, then power supply coverage is improved, but parasitic capacitances in signal wirings increase
Solution Approach 1:
The power supply wiring is designed with varying wiring widths along its length. Specifically, the wiring width is reduced in regions where the power supply wiring intersects with signal wirings, while maintaining larger widths in regions away from signal wirings. This local variation in wiring width allows the power supply wiring to provide adequate coverage while minimizing parasitic capacitance generation at critical intersection points.
2Object-generated harmful factors
If power supply wiring width is reduced at intersection points, then parasitic capacitance is reduced, but power supply capability deteriorates
Solution Approach 1:
The power supply wiring implements local quality variation by adjusting wiring width according to spatial position. In regions intersecting signal wirings, the width is reduced to minimize parasitic capacitance. In regions not intersecting signal wirings, the width is increased or maintained at standard dimensions to ensure adequate power supply capability. This spatially-dependent width variation resolves the contradiction between minimizing parasitic capacitance and maintaining power supply capability.
Solution Approach 2:
The power supply wiring transitions from a uniform one-dimensional trace to a two-dimensional structure with variable width. By introducing width variation as an additional degree of freedom, the design can simultaneously optimize for both low parasitic capacitance (narrow sections at intersections) and high power capability (wide sections in non-intersection regions), effectively resolving the contradiction through dimensional expansion of the design space.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces parasitic capacitances, stabilizes power supply potentials, and enhances signal quality by optimizing the intersection areas and wiring widths, allowing for better transmission characteristics.
Implementation Method 1
a plurality of through-hole conductors electrically connecting one of the first power supply wirings to one of the second power supply wirings
Implementation Method 2
parasitic capacitances are generated in intersection regions. Because these parasitic capacitances possibly degrade signal transmission characteristics, it is necessary to reduce the parasitic capacitances
Data Source
AI summary
Disclosed herein is a semiconductor device includes: a plurality of first power supply wirings provided on a first wiring layer and extending in a first direction; a plurality of second power supply wirings provided on a second wiring layer different from the first wiring layer and extending in a second direction intersecting the first direction; a signal wiring provided on the second wiring layer and extending in the second direction; and a plurality of through-hole conductors each electrically connecting an associated one of the first power supply wirings to an associated one of the second power supply wirings. At least a part of the first power supply wirings have a notch in a portion intersecting the signal wiring.