Semiconductor Device Probe Pad Segmentation for Testing
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Solution Overview
Problem
Semiconductor devices with small bump pads of several tens of micrometers in size pose a challenge for probe testing due to their inability to be probed directly by standard test equipment, necessitating the development of a semiconductor device capable of outputting data through a probe pad for effective testing.
Innovation Solution
A semiconductor device is designed with multiple channels and an I/O control unit that generates and outputs rising and falling clocks and data signals, allowing external data output through a pad unit, enabling probe testing by converting internal data into output data synchronized with clock signals for external probing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If bump pads are designed to have diameters of several tens of micrometers for high-speed operation and high integration, then device integration and operating speed are improved, but the bump pads become too small to be probed by standard test equipment
Solution Approach 1:
The patent introduces an intermediary probe pad structure that acts as a mediator between the small bump pads and standard test equipment. The probe pad includes a first pad region coupled to the bump pad and a second pad region having a larger size that can be probed by standard test equipment, thereby enabling testing without directly probing the small bump pad
Solution Approach 2:
The probe pad is segmented into two distinct regions: a first pad region that interfaces with the small bump pad and a second pad region with larger dimensions for test equipment probing. This segmentation allows each region to serve its specific function - the first region maintains electrical connection to the device while the second region provides accessible test points
Data Source
AI summary
A semiconductor device may include a first channel configured to output a first rising clock, a first falling clock, first rising data, and first falling data. The semiconductor device may include a second channel configured to output a second rising clock, a second falling clock, second rising data, and second falling data. The semiconductor device may include an I/O control unit configured to receive the first rising clock, the first falling clock, the first rising data, and the first falling data, generate output data, and externally output the output data through a pad unit or receive the second rising clock, the second falling clock, the second rising data, and the second falling data, generate the output data, and externally output the output data through the pad unit.